coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-10-17	soc/intel: deduplicate acpi_fill_soc_wake	Michael Niewöhner
2021-06-28	soc/intel: Drop casts around `soc_read_pmc_base()`	Angel Pons
2021-06-16	soc/intel/tigerlake: Make use of is_devfn_enabled() function	Subrata Banik
2021-04-26	soc/intel/tigerlake: Use device ID from pci_devs header file	John Zhao
2021-04-21	soc/intel/tigerlake: Fix devices list in the DMAR DRHD structure	John Zhao
2021-03-01	soc/intel: Factor out identical acpigen GPIO helpers	Angel Pons
2021-02-16	ACPI: Add acpi_reset_gnvs_for_wake()	Kyösti Mälkki
2021-02-08	soc/intel: Drop CID1 from GNVS	Kyösti Mälkki
2021-02-03	src: Remove unused <cbmem.h>	Elyes HAOUAS
2021-01-26	soc/intel: Move c-state resource define	Marc Jones
2021-01-20	ACPI GNVS: Drop most dev_count_cpu()	Kyösti Mälkki
2021-01-10	soc/intel: Rename to soc_fill_gnvs()	Kyösti Mälkki
2021-01-10	ACPI: Drop redundant ChromeOS setup for GNVS	Kyösti Mälkki
2021-01-10	ACPI: Drop redundant CONSOLE_CBMEM setup in GNVS	Kyösti Mälkki
2020-07-28	soc/intel/tigerlake: Simplify is-device-enabled checks	Felix Singer
2020-07-21	src: Use ACPI macros	Elyes HAOUAS
2020-06-30	ACPI: Drop typedef global_nvs_t	Kyösti Mälkki
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-11	soc/intel/tigerlake: Update C-State info	Wonkyu Kim
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-04-28	device: Constify struct device * parameter to write_acpi_tables	Furquan Shaikh
2020-04-24	soc/intel/tigerlake: Add ACPI GPIO op	Alex Levin
2020-04-14	soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type	John Zhao
2020-04-13	acpi: Bump FADT to revision 6	Patrick Rudolph
2020-04-06	soc/intel/tigerlake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-03-12	soc/intel/tigerlake: Enable VT-d and generate DMAR ACPI table	John Zhao
2020-01-10	soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper	Subrata Banik
2019-12-31	soc/intel/{icl,cnl,tgl}: Always add PM1_TMR block to FADT	Meera Ravindranath
2019-11-09	soc/intel/tigerlake: Do initial SoC commit till ramstage	Subrata Banik