coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-04-05	soc/intel/skylake: Enable VT-d and X2APIC	Nico Huber
2018-02-20	src/soc: Fix various typos	Jonathan Neuschäfer
2017-09-15	soc/intel/skylake: Move UNCORE PRMRR base and mask defines.	Pratik Prajapati
2017-09-14	soc/intel/skylake: Implement UNCORE PRMRR get base and mask API	Pratik Prajapati
2017-06-09	soc/intel/skylake: Use common systemagent code	Subrata Banik
2017-06-06	soc/intel/skylake: Use PCI IDs from device/pci_ids.h	Subrata Banik
2017-04-24	soc/intel/skylake: Add ID's for Kabylake-R	Naresh G Solanki
2017-02-16	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO...	Sooi, Li Cheng
2016-08-06	soc/intel/skylake: Add Kabylake device Ids	Rizwan Qureshi
2016-07-15	soc/intel/skylake: don't duplicate setting ACPI sleep state	Aaron Durbin
2016-01-19	intel/skylake: Fix issues found by klockwork	Naresh G Solanki
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-08-19	Skylake: update cbmem_top	Rizwan Qureshi
2015-07-21	intel fsp: remove CHIPSET_RESERVED_MEM_BYTES	Aaron Durbin
2015-07-16	soc/intel: Add Skylake SOC support	Lee Leahy
2015-07-16	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy