coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/skylake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-03-07	intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registers	Michael Niewöhner
2020-01-09	sb/intel/common: Add smbus_set_slave_addr()	Kyösti Mälkki
2019-01-10	soc/intel/common/block: Move tco common functions into block/smbus	Subrata Banik
2017-12-22	soc/intel/skylake: Make use of common SMM code for SKL	Subrata Banik
2017-05-09	soc/intel/skylake: Use intel/common/block/smbus code	Aamir Bohra
2017-03-17	soc/intel/skylake: Add int to unsigned	Lee Leahy
2016-08-18	skylake: Do FspTempRamInit only for FSP1.1 & tidy up PCH early init	Rizwan Qureshi
2016-08-08	soc/intel/skylake: Cleanup patch for Skylake SoC	Barnali Sarkar
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-07-16	soc/intel: Add Skylake SOC support	Lee Leahy
2015-07-16	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy