coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-11-27	soc/intel/skylake: Add device settings for PL4 power limit	Praveen hodagatta pranesh
2018-11-16	src: Get rid of duplicated includes	Elyes HAOUAS
2018-10-18	soc/intel/skylake: Prevent disabling of TCO	Naresh G Solanki
2018-10-09	soc/intel/skylake: Ensure FSP don't override ITSS IPCx registers	Subrata Banik
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-09-22	skylake,kabylake: Add support to set eMMC tuning param from dev tree	Pratik Prajapati
2018-08-17	soc/intel/skylake: permit Kconfig to set subsystem ID	Matt Delco
2018-07-09	soc/intel/skylake: config ISH in SOC side	li feng
2018-06-22	soc/intel/common/block/cpu: Add option to skip coreboot AP init	Subrata Banik
2018-06-07	soc/intel/common/pch: Add pch lockdown code	Subrata Banik
2018-06-06	soc/intel/common/block: Add common chip config block	Subrata Banik
2018-06-05	soc/intel/skylake: Add option to skip coreboot MP init	Subrata Banik
2018-06-05	soc/intel/skylake: Swap PCI devfn resides in same PCI device	Gaggery Tsai
2018-06-04	soc/intel/skylake: Get rid of device_t	Elyes HAOUAS
2018-05-08	{mb,nb,soc}: Remove references to pci_bus_default_ops()	Nico Huber
2018-05-04	soc/intel: unify VBT fetching API	Patrick Georgi
2018-04-24	compiler.h: add __weak macro	Aaron Durbin
2018-04-05	soc/intel/skylake: Generate ACPI DMAR table	Nico Huber
2018-04-05	soc/intel/skylake: Enable VT-d and X2APIC	Nico Huber
2018-03-28	soc/intel/skylake: Limit xDCI feature when VBOOT is enabled	Duncan Laurie
2018-02-06	soc/intel/skylake: Add devicetree variable for PCIe HotPlug	Duncan Laurie
2018-02-06	soc/intel/skylake: Set PsysPmax value	Gaggery Tsai
2018-01-02	soc/intel/skylake: Add device setting for sata power optimization	Kane Chen
2017-12-22	soc/intel/skylake: Add PcieRpClkSrcNumber UPD configuartion support	Divya Chellap
2017-12-14	soc/intel/skylake: Add integrated LAN config parameters	Duncan Laurie
2017-12-13	soc/intel/skylake: make tcc_offset take effect	marxwang
2017-12-13	soc/intel/skylake: Remove set_subsystem() from SoC	Subrata Banik
2017-12-08	soc/intel/skylake: Remove pch_enable_dev() from SoC	Subrata Banik
2017-10-22	soc/intel/skylake: pass SataSpeedLimit param to FSP2	Matt DeVillier
2017-10-06	soc/intel/skylake: use locate_vbt directly instead of calling a wrapper	Patrick Georgi
2017-10-05	soc/intel/skylake: Add config for mbx command for Intersil VR C-state issues	Rizwan Qureshi
2017-09-21	soc/intel/skylake: Add config for enabling LTR for PCIe Root port	Rizwan Qureshi
2017-09-06	soc/intel/skylake: Add config for enabling PCIe AER	Rizwan Qureshi
2017-08-25	soc/intel/skylake: Add LPC and SPI lock down config option	Subrata Banik
2017-08-22	soc/intel/skylake: Lock sideband access in coreboot and not in FSP	Barnali Sarkar
2017-07-25	soc/intel/skylake: Skip Spi Flash Lockdown from FSP	Barnali Sarkar
2017-05-16	soc/intel/skylake: Add option to enable/disable EIST	Subrata Banik
2017-03-22	soc/intel/skylake: Add option to disable host reads to PMC XRAM	Rizwan Qureshi
2017-03-17	soc/intel/skylake: Fix remaining issues detected by checkpatch	Lee Leahy
2017-03-08	intel/skylake: Add devicetree settings for acoustic noise mitigation	Duncan Laurie
2017-03-04	soc/intel/skylake: indicate voltage margining enabled/disabled	Rizwan Qureshi
2017-02-23	soc/intel/skylake: Enable Systemagent IMGU	Rizwan Qureshi
2017-02-22	soc/intel/skylake: Fix broken suspend-resume	Furquan Shaikh
2017-02-19	soc/intel/skylake: Disable s0ix if not enabled in devicetree	Duncan Laurie
2017-02-14	soc/intel/skylake: Perform CPU MP Init before FSP-S Init	Subrata Banik
2017-02-14	Revert: soc/intel/skylake: Set FSP-S UPD PchHdaIDispCodecDisconnect to 1	Duncan Laurie
2017-01-20	soc/intel/skylake: Set FSP-S UPD PchHdaIDispCodecDisconnect to 1	Barnali Sarkar
2017-01-11	skylake: Do not pass VBT to FSP if display init not required	Duncan Laurie
2016-12-01	romstage_handoff: add helper to determine resume status	Aaron Durbin
2016-11-30	soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0	Rizwan Qureshi
2016-11-30	soc/intel/skylake: Disable Legacy PME for Root ports	Naresh G Solanki
2016-11-28	soc/intel/skylake: Add USB Port Over Current (OC) Pin programming	Subrata Banik
2016-11-21	fsp2_0: implement stage cache for silicon init	Brandon Breitenstein
2016-11-11	soc/intel/skylake: move i2c voltage config to own variable	Aaron Durbin
2016-09-19	soc/intel/skylake: Add FSP 2.0 support in ramstage	Naresh G Solanki
2016-08-31	skylake: Add initial FSP2.0 support	Rizwan Qureshi