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path: root/src/soc/intel/skylake/chip.c
AgeCommit message (Expand)Author
2017-10-14intel/skylake: Use Sata related registers from devicetreeYouness Alaoui
2017-08-25soc/intel/skylake: Add LPC and SPI lock down config optionSubrata Banik
2017-06-07src: change coreboot to lowercaseMartin Roth
2017-03-17soc/intel/skylake: Wrap lines at 80 columnsLee Leahy
2017-03-17soc/intel/skylake: Add int to unsignedLee Leahy
2017-02-22soc/intel/skylake: Fix broken suspend-resumeFurquan Shaikh
2017-02-14soc/intel/skylake: Perform CPU MP Init before FSP-S InitSubrata Banik
2016-11-28soc/intel/skylake: Add USB Port Over Current (OC) Pin programmingSubrata Banik
2016-11-11soc/intel/skylake: move i2c voltage config to own variableAaron Durbin
2016-09-19soc/intel/skylake: Add FSP 2.0 support in ramstageNaresh G Solanki
2016-08-31src/soc: Add required space before opening parenthesis '('Elyes HAOUAS
2016-06-09skylake: Move I2C bus configuration to separate structureDuncan Laurie
2016-05-21skylake: Add ACPI device name handlerDuncan Laurie
2016-03-12soc/intel/skylake: add option to enable VR specific mailbox cmdRizwan Qureshi
2016-01-19intel/skylake: Adding provision to set voltages to the I2C portsNaresh G Solanki
2016-01-18intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInitBarnali Sarkar
2016-01-18intel/skylake: provide default VR configurationAaron Durbin
2016-01-17intel/skylake: disable heci1 if psf is unlockedArchana Patni
2016-01-16intel/skylake: Add VrConfig UPD parameters from corebootRizwan Qureshi
2016-01-16intel/skylake: Enable SkipMpInit tokenRizwan Qureshi
2016-01-15intel/skylake: More UPD params are added for PCH policy in FSPRizwan Qureshi
2016-01-15intel/skylake: Update UPD parameters as per FSP 1.8.0Barnali Sarkar
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-27intel/skylake: Clean up USB configuration in devicetreeDuncan Laurie
2015-10-27FSP 1.1: Replace soc_ prefix with fsp_Lee Leahy
2015-10-27intel/skylake: IRQ programming through UPDSubrata Banik
2015-10-27intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params updateRizwan Qureshi
2015-09-17intel/skylake: Create "RtcLock" Silicon UPD from corebootBarnali Sarkar
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
2015-09-08skylake: Apply USB2 and USB3 port enable/disable settingsDuncan Laurie
2015-08-27skylake: only generate ACPI cpu entries onceAaron Durbin
2015-08-19skylake: Update Memory and Silicon Init paramsRizwan Qureshi
2015-07-29skylake: remove the redundant fspNotify in chip final.robbie zhang
2015-07-16soc/intel: Add Skylake SOC supportLee Leahy
2015-07-16soc/intel/skylake: Use Broadwell as comparision base for Skylake SOCLee Leahy