| Age | Commit message (Expand) | Author |
|---|
| 2021-01-31 | soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK | Michael Niewöhner |
| 2021-01-25 | soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring | Michael Niewöhner |
| 2020-12-09 | soc/intel/common/dmi: Move DMI defines into DMI driver header | Srinidhi N Kaushik |
| 2020-11-29 | soc/intel: Configure P2SB before other PCH controllers | Furquan Shaikh |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-04-06 | soc/intel/skylake: Use SPDX for GPL-2.0-only files | Angel Pons |
| 2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
| 2020-03-18 | soc/intel/skylake: Control fixed IO decode from devicetree | Wim Vervoorn |
| 2020-02-17 | soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774 | Wim Vervoorn |
| 2020-02-17 | soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is set | Wim Vervoorn |
| 2019-12-26 | soc/intel/skylake: Rename pch_init() code | Usha P |
| 2019-11-22 | soc/intel/skylake: Refactor pch_early_init() code | Usha P |
| 2019-04-26 | soc/{amd,intel}/chip: Use local include for chip.h | Elyes HAOUAS |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
| 2019-03-01 | device/pci: Fix PCI accessor headers | Kyösti Mälkki |
| 2019-01-10 | soc/intel/common/block: Move tco common functions into block/smbus | Subrata Banik |
| 2018-08-10 | src: Fix typo | Elyes HAOUAS |
| 2018-06-28 | soc/intel/common/block: Move p2sb common functions into block/p2sb | Subrata Banik |
| 2018-06-14 | src: Get rid of device_t | Elyes HAOUAS |
| 2018-03-09 | soc/intel/skylake: Move PCR DMI programming into bootblock | Subrata Banik |
| 2017-11-15 | soc/intel/skylake: Make use of common CSE code for skylake | Subrata Banik |
| 2017-10-05 | soc/intel/skylake: Add support in SKL for PMC common code | Shaunak Saha |
| 2017-10-03 | soc/intel/skylake: Enable common LPC IP | Ravi Sarawadi |
| 2017-07-11 | soc/intel/skylake: Fix PMC address range setup for PCH-H | Nico Huber |
| 2017-07-11 | soc/intel/skylake: Set generic I/O decode ranges early | Nico Huber |
| 2017-05-09 | soc/intel/skylake: Use intel/common/block/smbus code | Aamir Bohra |
| 2017-05-02 | soc/intel/skylake: Clean up code by using common FAST_SPI module | Barnali Sarkar |
| 2017-04-28 | soc/intel/skylake: Use ITSS common code | Bora Guvendik |
| 2017-04-10 | soc/intel/skylake: Use RTC common code | Subrata Banik |
| 2017-04-10 | soc/intel/skylake: Use common PCR module | Subrata Banik |
| 2017-03-28 | soc/pci_devs.h: Use consistent naming in soc/pci_devs.h | Subrata Banik |
| 2017-03-17 | soc/intel/skylake: Fix remaining issues detected by checkpatch | Lee Leahy |
| 2017-03-17 | soc/intel/skylake: Wrap lines at 80 columns | Lee Leahy |
| 2016-11-30 | soc/skylake: Move IO decode range out from pch_lpc_init | Teo Boon Tiong |
| 2016-10-27 | skylake: Prepare GPE for use in bootblock | Duncan Laurie |
| 2016-10-16 | soc/intel/skylake: Enable HECI BAR for ME communication | Subrata Banik |
| 2016-08-18 | soc/intel/skylake: Move bootblock specific code from skylake/romstage | Naresh G Solanki |
| 2016-08-18 | skylake: Do FspTempRamInit only for FSP1.1 & tidy up PCH early init | Rizwan Qureshi |
| 2016-07-28 | soc/intel/skylake: Add C entry bootblock support | Subrata Banik |
| 2016-02-04 | intel/skylake: unconditionally set SPI controller BAR | Aaron Durbin |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-07-16 | soc/intel: Add Skylake SOC support | Lee Leahy |
| 2015-07-16 | soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC | Lee Leahy |
