coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-20	soc/intel/skylake: Update systemagent.asl to ASL2.0	Furquan Shaikh
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/skylake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-01-26	soc/intel/skylake: Update 64 bit SA DRAM bit fields as per datasheet	Subrata Banik
2020-01-26	soc/intel/skylake: Add _SEG/_UID name variables	Subrata Banik
2020-01-26	soc/intel/skylake: Only reserve TPM area for !CONFIG_TPM_CR50 device	Subrata Banik
2020-01-24	soc/intel/skylake: Remove unused ICH memory reference	Subrata Banik
2020-01-24	soc/intel/skylake: Move pci_irqs.asl from SA to PCH	Subrata Banik
2020-01-10	soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper	Subrata Banik
2020-01-07	soc/intel/{apl,cnl,icl,skl,tgl}: Clean up SA ASL code	Subrata Banik
2019-10-25	soc/intel: Drop wrong _ADR objects	Elyes HAOUAS
2016-08-08	soc/intel/skylake: Clean up SoC ASL code.	Barnali Sarkar
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-14	skylake: ACPI: Fix compiler warnings with iasl-20150717	Duncan Laurie
2015-09-28	skylake: ACPI: Remove Configurable TDP support code	Duncan Laurie
2015-09-09	intel/skylake: ACPI: Clean up formatting in and fix ASL code	Duncan Laurie
2015-07-16	soc/intel: Add Skylake SOC support	Lee Leahy
2015-07-16	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy