coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-10-05	soc/intel/common/block/acpi: Factor out common smbus.asl	Subrata Banik
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/skylake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-01-24	soc/intel/skylake: Move pci_irqs.asl from SA to PCH	Subrata Banik
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2018-02-16	soc/intel/skylake: Switch to common PCR ASL	Lijian Zhao
2017-10-20	soc/intel/skylake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-10-02	soc/intel/skylake: Use common/block/gpio	Hannah Williams
2017-04-28	soc/intel/skylake: Use ITSS common code	Bora Guvendik
2017-04-10	soc/intel/skylake: Use common PCR module	Subrata Banik
2015-12-03	intel/skylake: Add ACPI device for audio controller	Duncan Laurie
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-08	skylake: ACPI: Clean up and fix XHCI ACPI Device	Duncan Laurie
2015-09-08	skylake: ACPI: Move storage controllers to separate file	Duncan Laurie
2015-09-08	skylake: ACPI: Remove itss.asl and cleanup irqlinks.asl	Duncan Laurie
2015-09-08	skylake: ACPI: Add functions for PCR access	Duncan Laurie
2015-09-08	skylake: ACPI: Clean up pch.asl	Duncan Laurie
2015-07-16	soc/intel: Add Skylake SOC support	Lee Leahy
2015-07-16	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy