coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-04-22	soc/intel/quark: Fix MTRR reads	Lee Leahy
2016-04-22	soc/intel/quark: Fix uninitialized variable d_variant	Lee Leahy
2016-03-21	soc/intel/quark: Disable the ROM shadow	Lee Leahy
2016-03-08	soc/intel/quark: Set the UPD values for MemoryInit	Lee Leahy
2016-03-08	soc/intel/quark: Add the UPD support for SiliconInit	Lee Leahy
2016-03-07	soc/intel/quark: Split out MTRR support	Lee Leahy
2016-02-29	soc/intel/quark: Reserve non-MMIO space	Lee Leahy
2016-02-29	soc/intel/quark: Initialize some of the FADT base registers	Lee Leahy
2016-02-22	soc/intel/quark: Add the initial pieces required for ACPI tables	Lee Leahy
2016-02-19	soc/intel/quark: Use single ID value for HSUART1	Lee Leahy
2016-02-18	soc/intel/quark: Enable HSUART1	Lee Leahy
2016-02-18	soc/intel/quark: Establish the Memory Map	Lee Leahy
2016-02-18	soc/intel/quark: Enumerate the PCI devices	Lee Leahy
2016-02-10	soc/intel/quark: Report CPU info	Lee Leahy
2016-02-10	soc/intel/quark: Call FSP SiliconInit	Lee Leahy
2016-02-10	soc/intel/quark: MTRR support	Lee Leahy
2016-02-10	soc/intel/quark: FSP MemoryInit Support	Lee Leahy
2016-02-09	soc/intel/quark: Enable Serial Port	Lee Leahy
2016-02-08	soc/intel/quark: Add TempRamInit support	Lee Leahy
2016-02-08	soc/intel/quark: Enable ESRAM	Lee Leahy
2016-02-04	soc/intel/quark: Add minimal Quark SoC X1000 files	Lee Leahy