coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-07-13	soc/intel: Rename pcr.asl to pch_pcr.asl	Subrata Banik
2021-09-10	soc/intel/jasperlake: Switch to runtime generation of Intel Power Engine	Tim Wawrzynczak
2021-03-01	soc/intel: Include gfx.asl from northbridge	Angel Pons
2020-12-30	soc/intel/common: Move gfx.asl to drivers/intel/gma	Matt DeVillier
2020-11-20	soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD	Michael Niewöhner
2020-10-08	soc/intel: Make use of common gfx.asl	Subrata Banik
2020-10-05	soc/intel/common/block/acpi: Factor out common ish.asl	Subrata Banik
2020-10-05	soc/intel/common/block/acpi: Factor out common smbus.asl	Subrata Banik
2020-10-05	soc/intel/common/block/acpi: Factor out common pch_glan.asl	Subrata Banik
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-04-10	soc/intel/jasperlake: Publish EMMC and SD card ACPI devices	Aamir Bohra
2020-03-28	soc/intel/jasperlake: Add Jasper Lake SoC support	Aamir Bohra