coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/icelake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-02-11	vendorcode/intel: Remove Ice Lake FSP Bindings	Johanna Schander
2019-11-07	soc/intel/icelake: Refactor pch_early_init() code	Subrata Banik
2019-09-29	soc/intel: Rename <intelblocks/chip.h>	Kyösti Mälkki
2019-08-28	soc/intel: Move fill_postcar_frame to memmap.c	Kyösti Mälkki
2019-08-26	intel/car: Use common TS_START_ROMSTAGE	Kyösti Mälkki
2019-08-26	soc/intel: Use common romstage code	Kyösti Mälkki
2019-08-22	arch/x86: Add <arch/romstage.h>	Kyösti Mälkki
2019-07-09	soc/intel/icelake: Refer to soc/soc_chip.h rather than chip.h	Subrata Banik
2019-07-04	arch/x86: Adjust size of postcar stack	Kyösti Mälkki
2019-06-21	soc/intel: Provide SPD manufacturer ID and module type to SMBIOS	Duncan Laurie
2019-06-06	src/soc/intel/common/smbios: Add addtional infos to dimm_info	Christian Walter
2019-05-18	soc/intel: Fill DIMM serial number from SPD	Duncan Laurie
2019-04-26	soc/{amd,intel}/chip: Use local include for chip.h	Elyes HAOUAS
2019-04-23	src: include <assert.h> when appropriate	Elyes HAOUAS
2019-03-29	soc/intel/icelake: Fix chipset_power_state structure	Subrata Banik
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-02-18	soc/intel: Add mem_rank info in SMBIOS	Francois Toguo
2019-02-13	soc/intel/icelake: Don't use CAR_GLOBAL	Arthur Heymans
2018-10-26	soc/intel/icelake: Do initial SoC commit	Aamir Bohra