coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-04-26	soc/{amd,intel}/chip: Use local include for chip.h	Elyes HAOUAS
2019-03-16	drivers/intel/fsp1_0: Deduplicate code	Patrick Rudolph
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-02-11	soc/intel/fsp_broadwell_de: Move FSP_DEBUG_LEVEL option here	Nico Huber
2019-01-15	vendorcode/intel/fsp1_0/broadwell_de: Use FSP from 3rdparty/fsp	Patrick Rudolph
2019-01-14	intel/fsp1_0: Add option to select FSP debug level	Patrick Rudolph
2019-01-14	soc/intel/fsp_broadwell_de: Fix uart	Patrick Rudolph
2018-10-22	intel: Use CF9 reset (part 1)	Patrick Rudolph
2018-05-05	fsp_broadwell_de: Add option to enable EHCI controllers	David Hendricks
2018-04-16	intel/fsp_broadwell_de: Set FSP serial speed to match coreboot's	David Hendricks
2018-04-06	fsp_broadwell_de: Provide valid address and size for DCACHE range	Werner Zeh
2016-04-20	intel/fsp_broadwell_de: fix SPD CBFS file type	Stef van Os
2016-04-14	soc/intel: Add Broadwell-DE SoC support	York Yang