| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-11-21 | soc/intel/fsp_baytrail: Drop support | Arthur Heymans |
| 2019-01-06 | device: Use pcidev_on_root() | Kyösti Mälkki |
| 2018-10-11 | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS |
| 2018-06-04 | soc/intel/fsp_baytrail: Get rid of device_t | Elyes HAOUAS |
| 2015-12-16 | intel/fsp_baytrail: rename include folder baytrail to include/soc | Ben Gardner |
| 2015-11-21 | baytrail: add C0 and D0 stepping decode | Ben Gardner |
| 2015-11-16 | intel/fsp_baytrail: Load APs microcode in baytrail_init_cpus | York Yang |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-03-10 | ACPI: Get S3 resume state from romstage_handoff | Kyösti Mälkki |
| 2014-09-29 | intel/fsp_baytrail: Add S3 suspend/resume Support | Mohan D'Costa |
| 2014-05-29 | fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip | Martin Roth |
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index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |