coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-10-22	intel: Use CF9 reset (part 1)	Patrick Rudolph
2018-07-30	soc/intel/fsp_baytrail: Add VBOOT support	Philipp Deppenwiese
2017-12-17	soc/intel/fsp_baytrail: remove nvm headers and code	Aaron Durbin
2017-01-13	fsp_baytrail: Enable graphic init per default	Werner Zeh
2016-04-28	fsp_baytrail: Fix missing "$" when using Kconfig switch	Werner Zeh
2016-03-14	intel/fsp_baytrail: Enable LPSS in ACPI mode	Ben Gardner
2016-03-13	intel/fsp_baytrail: Fix LPE initialization and enable ACPI mode	Ben Gardner
2016-02-25	fsp_baytrail: Fix a possible hanging DisplayPort	Werner Zeh
2015-12-16	intel/fsp_baytrail: rename include folder baytrail to include/soc	Ben Gardner
2015-11-17	fsp_baytrail: use external microcode .h files	Martin Roth
2015-11-16	intel/fsp_baytrail: Load APs microcode in baytrail_init_cpus	York Yang
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-30	cpu: microcode: Use microcode stored in binary format	Alexandru Gagniuc
2015-09-29	intel: auto include intel/common/firmware	Aaron Durbin
2015-07-02	Move baytrail & fsp_baytrail to the common IFD interface.	Martin Roth
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-29	kbuild: automatically include SOCs	Stefan Reinauer
2015-03-05	fsp_baytrail: Add I2C driver	Werner Zeh
2015-01-27	CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM	Kyösti Mälkki
2014-12-17	fsp_baytrail: Add code to read GPIOs in romstage	Martin Roth
2014-07-17	soc,Makefile.inc: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2014-05-29	fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip	Martin Roth