coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-06-02	soc/intel/denverton_ns: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/denverton_ns: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-12-19	src/soc/intel: Remove unused <stdlib.h>	Elyes HAOUAS
2019-09-12	src/{northbridge,soc}: Remove not used #include <elog.h>	Elyes HAOUAS
2019-08-13	cpu/x86: Separate save_state struct headers	Kyösti Mälkki
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-01-24	Revert "soc/intel/denverton_ns: Rewrite pmutil using pmclib"	Patrick Georgi
2019-01-24	soc/intel/denverton_ns: Rewrite pmutil using pmclib	Julien Viard de Galbert
2019-01-03	soc/intel: Fix bad uses of __SIMPLE_DEVICE__	Kyösti Mälkki
2018-06-14	src: Get rid of device_t	Elyes HAOUAS
2017-09-05	soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC	Mariusz Szafranski