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path: root/src/soc/intel/denverton_ns/bootblock
AgeCommit message (Expand)Author
2024-03-30soc/intel: Remove blank lines before '}' and after '{'Elyes Haouas
2023-01-23soc/intel/denverton_ns: Use common gpio.h includeDinesh Gehlot
2021-12-15soc/intel/denverton_ns: Fix MRC_RW_CACHEKyösti Mälkki
2021-11-10Rename ECAM-specific MMCONF KconfigsShelley Chen
2021-08-19soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESSKyösti Mälkki
2020-06-06src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-03-18soc: Remove copyright noticesPatrick Georgi
2019-11-26soc/intel/{apl,cnl,dnv,skl}: Skip ucode loading by FSP-TSubrata Banik
2019-08-26lib/bootblock: Add simplified entry with basetimeKyösti Mälkki
2019-07-15src: Use '#include <timestamp.h>' when neededElyes HAOUAS
2019-05-29soc/intel/denverton_ns: Don't use CONFIG_CBFS_SIZEArthur Heymans
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-01-03soc/intel: Fix bad uses of __SIMPLE_DEVICE__Kyösti Mälkki
2018-11-16src: Remove unneeded include <lib.h>Elyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-10-25soc/intel: Consolidate FSP CAR setup and teardown codePraveen hodagatta pranesh
2018-06-14src: Get rid of device_tElyes HAOUAS
2018-05-22bootblock: Allow more timestamps in bootblock_main_with_timestamp()Julius Werner
2018-03-09soc/intel/denverton_ns: Update UART legacy mode to keep FSP tracesJulien Viard de Galbert
2018-02-20src/soc: Fix various typosJonathan Neuschäfer
2018-01-28soc/intel/denverton_ns: Rename HARCUVAR macros to DENVERTONJulien Viard de Galbert
2017-09-05soc/intel/denverton_ns: Add support for Intel Atom C3000 SoCMariusz Szafranski