coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-02-25	soc/intel/common: Update Jasper Lake Device IDs	Meera Ravindranath
2020-01-22	soc/intel/common: Add Elkhartlake Device IDs	Tan, Lean Sheng
2019-12-13	soc/intel/common: Add PCI device IDs for CMP-H	Gaggery Tsai
2019-11-05	soc/intel/common: Include Tigerlake device IDs	Ravi Sarawadi
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-02-26	soc/intel/common: Include cometlake PCH IDs	Ronak Kanabar
2019-01-23	soc/{amd,intel}: Remove needless '&' on function pointers	Elyes HAOUAS
2018-11-07	soc/intel/common: Include Icelake device IDs	Aamir Bohra
2018-10-17	soc/intel/cannonlake: Add new cannon lake PCH-H support	praveen hodagatta pranesh
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-04-27	soc/intel/common/block/xdci: Use vboot_can_enable_udc in xdci_can_enable	Furquan Shaikh
2018-04-24	compiler.h: add __weak macro	Aaron Durbin
2018-03-28	soc/intel/common: Add function to check if xDCI is allowed	Duncan Laurie
2017-12-13	soc/intel/common/block: Add option to have subsystem_id in common pci driver	Subrata Banik
2017-08-04	soc/intel/common: Add Cannonlake pci ids for common	Lijian Zhao
2017-05-06	soc/intel/common/block: correct apollolake device ids	Aaron Durbin
2017-05-05	soc/intel/common/block: Add Intel XDCI code support	Subrata Banik