| Age | Commit message (Expand) | Author |
|---|
| 2019-03-20 | src: Use 'include <string.h>' when appropriate | Elyes HAOUAS |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-02-26 | soc/intel/common: Include cometlake PCH IDs | Ronak Kanabar |
| 2019-01-23 | soc/{amd,intel}: Remove needless '&' on function pointers | Elyes HAOUAS |
| 2019-01-09 | soc/intel: Clean mess around UART_DEBUG | Nico Huber |
| 2018-11-07 | soc/intel/common: Include Icelake device IDs | Aamir Bohra |
| 2018-10-17 | soc/intel/cannonlake: Add new cannon lake PCH-H support | praveen hodagatta pranesh |
| 2018-10-08 | Move compiler.h to commonlib | Nico Huber |
| 2018-08-20 | soc/intel/common/block: Move common uart function to block/uart | Subrata Banik |
| 2018-06-14 | src: Get rid of device_t | Elyes HAOUAS |
| 2018-04-24 | compiler.h: add __weak macro | Aaron Durbin |
| 2018-02-20 | src/soc: Fix various typos | Jonathan Neuschäfer |
| 2018-02-07 | soc/intel/skylake: Add Kabylake PCH H device ID's | V Sowmya |
| 2018-01-25 | soc/intel/skylake: Clean up the skylake PCH H device ID macros | V Sowmya |
| 2017-12-13 | soc/intel/common/block: Add option to have subsystem_id in common pci driver | Subrata Banik |
| 2017-08-10 | soc/intel/common/uart: Add support for enabling UART debug controller on resume | Furquan Shaikh |
| 2017-08-10 | soc/intel/common/uart: Refactor uart_common_init | Furquan Shaikh |
| 2017-08-04 | soc/intel/common: Add Cannonlake pci ids for common | Lijian Zhao |
| 2017-05-22 | soc/intel/common/block/uart: Add GLK UART pci ids | Hannah Williams |
| 2017-05-09 | soc/intel/common: Add PCI configuration code for UART | Aamir Bohra |
| 2017-04-11 | soc/intel/common/block: Add Intel common UART code | Aamir Bohra |
