coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-06-26	soc/intel/cache_as_ram.S: Fix CAR issues with Bootguard	Arthur Heymans
2021-06-24	soc/intel/cache_as_ram.S: Fix SOC_INTEL_APOLLOLAKE	Arthur Heymans
2021-06-24	soc/intel/cache_as_ram.S: Add macro to detect bootguard nem	Arthur Heymans
2021-06-22	soc/intel/car: Add support for bootguard CAR	Arthur Heymans
2021-06-22	soc/intel/common/cache_as_ram.S: Add macro to clear CAR	Arthur Heymans
2021-06-22	soc/intel/common/cache_as_ram.S: Add macro to find a free MTRR	Arthur Heymans
2021-06-18	soc/intel/car/cache_as_ram.S: Fix typo in comment	Arthur Heymans
2021-06-11	soc/intel/{common,alderlake}: Use generic name "Alderlake Platform"	Sridhar Siricilla
2021-05-14	soc/intel/alderlake: Update CPU and IGD Device IDs	Maulik V Vaghela
2021-05-05	drivers/intel/fsp2_0: Fix the FSP-T position	Arthur Heymans
2021-04-22	soc/intel/common,skl: set MSR LT_LOCK_MEMORY once, not per thread	Michael Niewöhner
2021-03-18	soc/intel/block/cpu/mp_init.c: Remove weak functions	Arthur Heymans
2021-03-11	soc/intel/common/block/cpu: Use tab instead of space	Subrata Banik
2021-03-05	soc/intel/common/block/cpu: Use tab instead of space	Subrata Banik
2021-03-03	soc/intel: Factor out common smmrelocate.c	Angel Pons
2021-02-23	intel/common/block/cpu: Add APIs to get CPU info from lapic ID	Aamir Bohra
2021-02-06	intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI	Furquan Shaikh
2021-02-06	intel: Drop FSP_PEIM_TO_PEIM_INTERFACE	Furquan Shaikh
2021-02-01	soc/intel/*: Get rid of custom microcode caching	Patrick Rudolph
2021-02-01	drivers/intel/fsp2_0: Use coreboot postcar with FSP-T	Arthur Heymans
2021-01-22	soc/intel/commmon: Include Alder Lake device IDs	Varshit Pandya
2021-01-07	arch/x86: Move prologue to .init section	Kyösti Mälkki
2020-12-14	src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL	Shreesh Chhabbi
2020-12-14	soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option	Shreesh Chhabbi
2020-12-08	soc/intel/common/block/cpu/car: Fix two whitespace issues	Subrata Banik
2020-12-01	soc/intel/common/block/cpu/car/exit_car: Fix compilation on x86_64	Patrick Rudolph
2020-12-01	soc/intel/common/block/cpu/car/cache_as_ram: Add x86_64 support	Patrick Rudolph
2020-11-02	soc/intel/fsp-car: Use the coreboot defined stack	Arthur Heymans
2020-11-02	drivers/intel/fsp2_0: Add function to report FSP-T output	Arthur Heymans
2020-10-28	soc/intel: deduplicate ACPI timer emulation	Michael Niewöhner
2020-10-21	{cpu,soc}/intel: replace AES-NI locking by common implemenation call	Michael Niewöhner
2020-10-21	soc/intel: convert XTAL frequency constant to Kconfig	Michael Niewöhner
2020-10-21	soc/intel/common: add Kconfig for PM Timer emulation support	Michael Niewöhner
2020-10-16	include/cpu/x86: introduce new helper for (un)setting MSRs	Michael Niewöhner
2020-09-29	soc/intel/common: Add config option to enable TME/MKTME	Pratik Prajapati
2020-09-21	soc/intel: rename get_prmrr_size	Michael Niewöhner
2020-09-21	soc/intel/common/block/sgx: make PRMRR size setting depend on SGX	Michael Niewöhner
2020-09-16	soc/intel/common/block: Do not die if PRMRR size unsupported	Angel Pons
2020-09-15	soc/intel/common/block/cpu: Fix boot failure	Patrick Rudolph
2020-09-14	soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode	Aamir Bohra
2020-08-27	soc/intel/common: Add Elkhart Lake B0 CPU ID	Tan, Lean Sheng
2020-08-06	soc/intel/common/block/cpu: Refactor init_cpus function	Subrata Banik
2020-08-05	soc/intel/common: Include Alder Lake device IDs	Subrata Banik
2020-07-26	src/soc/intel: Add include <types.h>	Elyes HAOUAS
2020-07-03	soc/intel/common: Only touch Time Window Tau bits in supported SoCs	Tim Wawrzynczak
2020-07-01	soc/intel/common/cpu: Don't set any TCC settings if offset is 0	Tim Wawrzynczak
2020-06-28	soc/intel/common: add TCC activation functionality	Sumeet R Pawnikar
2020-06-25	drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1	Jonathan Zhang
2020-06-15	arch/x86: Remove NO_FIXED_XIP_ROM_SIZE	Kyösti Mälkki
2020-06-06	src: Remove unused 'include <cpu/x86/mtrr.h>'	Elyes HAOUAS
2020-06-06	soc/intel/tigerlake: Add CPU ID for TGL B0	Jamie Ryu
2020-06-01	soc/intel/common/block: Remove unused headers	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-05-01	src: Remove unused 'include <cpu/x86/cache.h>'	Elyes HAOUAS
2020-04-06	soc/intel/common: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-03-04	soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE	Arthur Heymans
2020-02-25	soc/intel/common: Update Jasper Lake Device IDs	Meera Ravindranath
2020-02-04	soc/intel: Remove duplicate CPUID entry	Subrata Banik
2020-01-22	soc/intel/common: Add Elkhartlake Device IDs	Tan, Lean Sheng
2019-12-02	src/soc/intel: Add Cometlake-S and CMP-H skus	Gaggery Tsai
2019-11-15	soc/intel/common: Make alignment proper for comments	Subrata Banik
2019-11-12	arch/x86/car.ld: Rename suffix _start/_end	Arthur Heymans
2019-11-06	soc/intel/common: Make native and FSP-T CAR init mutually exclusive	Arthur Heymans
2019-11-05	soc/intel/common: Include Tigerlake device IDs	Ravi Sarawadi
2019-11-05	soc/intel/common: Don't link CAR teardown in romstage	Arthur Heymans
2019-11-04	soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig	Michael Niewöhner
2019-10-31	soc/intel/common: add common function to set LT_LOCK_MEMORY	Michael Niewöhner
2019-09-29	soc/intel: Rename <intelblocks/chip.h>	Kyösti Mälkki
2019-09-11	arch/x86: Restrict use of _car_global[start\|end]	Kyösti Mälkki
2019-08-15	soc/*: mp_run_on_all_cpus: Remove configurable timeout	Patrick Rudolph
2019-08-12	soc/intel/common: Fix typo mistake in cache_as_ram.S	Subrata Banik
2019-07-30	soc/intel/cannonlake: Add new PCI IDs	Felix Singer
2019-07-17	soc/intel/cannonlake: Add device Ids for new CFL SKUs support	Lean Sheng Tan
2019-07-10	soc/intel/block/cpu: remove unused USE_COREBOOT_NATIVE_MP_INIT	Arthur Heymans
2019-05-21	soc/intel: Remove unused pointer argument in mca_configure()	Subrata Banik
2019-05-13	soc/intel: Geminilake Refresh feature request support	John Zhao
2019-04-23	src: Add missing include 'console.h'	Elyes HAOUAS
2019-04-21	cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset	Arthur Heymans
2019-04-13	soc/intel/cpulib: Remove redundent enable/disable functions	Subrata Banik
2019-04-13	soc/intel/cpulib: Factor out IA32_PERF_CTL (0x199) MSR code	Subrata Banik
2019-04-06	src: Use include <delay.h> when appropriate	Elyes HAOUAS
2019-03-29	src: Use include <reset.h> when appropriate	Elyes HAOUAS
2019-03-24	soc/intel/common: Remove common chip config use_fsp_mp_init	Subrata Banik
2019-03-24	soc/intel/common: Add Kconfig option to choose desired MP Init for platform	Subrata Banik
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-02-24	soc/intel/common: Include cometlake CPU IDs	Ronak Kanabar
2019-02-19	soc/intel/common: Add whiskeylake celeron v-0 support	Lijian Zhao
2019-02-05	soc/intel/cpulib: Add debug message to mca_configure()	Nico Huber
2019-01-08	arch/x86: Link walkcbfs.S instead of including it	Arthur Heymans
2018-11-23	intelblocks/cpu: Fix wrong comment for P_Req field in PERF_CTL MSR	Werner Zeh
2018-11-23	intelblocks/cpu: Add function to set CPU clock to minimum value	Werner Zeh
2018-11-16	src: Remove unneeded include <lib.h>	Elyes HAOUAS
2018-11-12	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS
2018-11-07	soc/intel/common: Include Icelake device IDs	Aamir Bohra
2018-10-25	soc/intel: Consolidate FSP CAR setup and teardown code	Praveen hodagatta pranesh