| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-08-10 | soc/intel/common/block: Add CNL, APL and GLK CPU device IDs | Barnali Sarkar |
| 2017-06-29 | arch/x86: update assembly to ensure 16-byte alignment into C | Aaron Durbin |
| 2017-06-23 | soc/intel/common/block: Add common MP Init code | Barnali Sarkar |
| 2017-06-09 | soc/intel/common/block: Add Intel common CPU library code | Barnali Sarkar |
| 2017-03-28 | soc/intel/common/block: Add cache as ram init and teardown code | Subrata Banik |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |