coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-06-28	soc/intel: Add Raptor Lake device IDs	zhixingma
2022-06-22	soc/intel/mp_init: Skip before_post_cpus_init if !USE_COREBOOT_MP_INIT	Subrata Banik
2022-06-22	soc/intel/cmn/block/cpu: Perform PRMRR sync on all cores	Subrata Banik
2022-06-22	intel/mp_init: Call `intel_reload_microcode()` before post_cpus_init()	Subrata Banik
2022-06-14	soc/intel/cmn/cpu: API to initialize core PRMRR	Subrata Banik
2022-06-14	soc/intel/common: Remove use of CPUID_EXTENDED_CPU_TOPOLOGY_V2	Ronak Kanabar
2022-06-09	soc/intel/cmn/mp_init: Reload microcode patch before post_cpus_init()	Subrata Banik
2022-06-07	soc/intel/cmn/mp_init: Create helper function to load microcode	Subrata Banik
2022-06-07	soc/intel/cmn/block/cpu: Set BIOS_DONE on all CPUs	Subrata Banik
2022-05-26	soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig	Felix Singer
2022-05-18	intel/common/block: Provide RAPL and min clock ratio switches in common	Uwe Poeche
2022-05-16	soc/intel: Add Raptor Lake device IDs	Bora Guvendik
2022-05-16	soc/intel/common: Use mp_run_on_all_cpus_synchronously for APs MTRR init	Kane Chen
2022-05-16	soc/intel: Remove unused <cpu/intel/common/common.h>	Elyes HAOUAS
2022-04-04	soc/intel/alderlake: Add new CPU ID	Lean Sheng Tan
2022-04-04	soc/intel/alderlake: Update CPU IDs with correct steppings	Lean Sheng Tan
2022-04-01	arch/x86/postcar: Use a separate stack for C execution	Arthur Heymans
2022-03-17	soc/intel/common/block/cpu: Enable ROM caching in ramstage	Subrata Banik
2022-03-09	soc/intel/common: Include Meteor Lake device IDs	Wonkyu Kim
2022-01-11	soc/intel/apl: Rework on CPU privilege level implementation	Subrata Banik
2022-01-10	soc/intel/common: Add missing space before }	Paul Menzel
2021-12-13	soc/intel/common/block/cpu/car/exit_car_fsp.S: Align stack	Arthur Heymans
2021-12-06	soc/intel/common: Refactor cpu_set_p_state_to_max_non_turbo_ratio	Sridhar Siricilla
2021-12-06	soc/intel/common: Add CPU related APIs	Sridahr Siricilla
2021-11-29	soc/intel/common: Include Alder Lake-N device IDs	Usha P
2021-11-18	drivers/fsp: Rewrite post code hex values in lowercase	Sean Rhodes
2021-10-22	cpu/x86/mp_init: use cb_err as status return type in remaining functions	Felix Held
2021-10-17	soc/intel/*: only enable PM Timer emulation if the PM Timer is disabled	Michael Niewöhner
2021-10-05	src/soc to src/superio: Fix spelling errors	Martin Roth
2021-10-02	soc/intel/common: round PM Timer emulation frequency multiplier	Michael Niewöhner
2021-09-30	soc/intel/alderlake: Add CPU ID 0x906a4	Meera Ravindranath
2021-09-20	soc/intel/{common,tgl,adl}: guard TME Kconfig option by SoC support	Michael Niewöhner
2021-08-24	soc/intel: Add TGL-H CPUID	Jeremy Soller
2021-08-16	soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS Kconfig	Subrata Banik
2021-08-15	soc/intel/common: Calculate and configure SF Mask 1	Subrata Banik
2021-08-15	soc/intel/common: Calculate and configure SF Mask 2	Subrata Banik
2021-08-09	soc/intel/common/cpu: Handle non-zero BSP APIC ID in init_cpus	MAULIK V VAGHELA
2021-07-24	soc/intel/common/block: Add space before comment delimiter	Subrata Banik
2021-07-14	src: use mca_clear_status function instead of open coding	Felix Held
2021-07-14	soc/intel/common: Use SPR for backing up data way and eviction mask	Subrata Banik
2021-07-14	soc/intel/common/block/cpu/cpulib: use mca_get_bank_count()	Felix Held
2021-07-14	include/cpu/x86/msr: introduce IA32_MC_*(x) macros	Felix Held
2021-06-26	soc/intel/cache_as_ram.S: Fix CAR issues with Bootguard	Arthur Heymans
2021-06-24	soc/intel/cache_as_ram.S: Fix SOC_INTEL_APOLLOLAKE	Arthur Heymans
2021-06-24	soc/intel/cache_as_ram.S: Add macro to detect bootguard nem	Arthur Heymans
2021-06-22	soc/intel/car: Add support for bootguard CAR	Arthur Heymans
2021-06-22	soc/intel/common/cache_as_ram.S: Add macro to clear CAR	Arthur Heymans
2021-06-22	soc/intel/common/cache_as_ram.S: Add macro to find a free MTRR	Arthur Heymans
2021-06-18	soc/intel/car/cache_as_ram.S: Fix typo in comment	Arthur Heymans
2021-06-11	soc/intel/{common,alderlake}: Use generic name "Alderlake Platform"	Sridhar Siricilla
2021-05-14	soc/intel/alderlake: Update CPU and IGD Device IDs	Maulik V Vaghela
2021-05-05	drivers/intel/fsp2_0: Fix the FSP-T position	Arthur Heymans
2021-04-22	soc/intel/common,skl: set MSR LT_LOCK_MEMORY once, not per thread	Michael Niewöhner
2021-03-18	soc/intel/block/cpu/mp_init.c: Remove weak functions	Arthur Heymans
2021-03-11	soc/intel/common/block/cpu: Use tab instead of space	Subrata Banik
2021-03-05	soc/intel/common/block/cpu: Use tab instead of space	Subrata Banik
2021-03-03	soc/intel: Factor out common smmrelocate.c	Angel Pons
2021-02-23	intel/common/block/cpu: Add APIs to get CPU info from lapic ID	Aamir Bohra
2021-02-06	intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI	Furquan Shaikh
2021-02-06	intel: Drop FSP_PEIM_TO_PEIM_INTERFACE	Furquan Shaikh
2021-02-01	soc/intel/*: Get rid of custom microcode caching	Patrick Rudolph
2021-02-01	drivers/intel/fsp2_0: Use coreboot postcar with FSP-T	Arthur Heymans
2021-01-22	soc/intel/commmon: Include Alder Lake device IDs	Varshit Pandya
2021-01-07	arch/x86: Move prologue to .init section	Kyösti Mälkki
2020-12-14	src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL	Shreesh Chhabbi
2020-12-14	soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option	Shreesh Chhabbi
2020-12-08	soc/intel/common/block/cpu/car: Fix two whitespace issues	Subrata Banik
2020-12-01	soc/intel/common/block/cpu/car/exit_car: Fix compilation on x86_64	Patrick Rudolph
2020-12-01	soc/intel/common/block/cpu/car/cache_as_ram: Add x86_64 support	Patrick Rudolph
2020-11-02	soc/intel/fsp-car: Use the coreboot defined stack	Arthur Heymans
2020-11-02	drivers/intel/fsp2_0: Add function to report FSP-T output	Arthur Heymans
2020-10-28	soc/intel: deduplicate ACPI timer emulation	Michael Niewöhner
2020-10-21	{cpu,soc}/intel: replace AES-NI locking by common implemenation call	Michael Niewöhner
2020-10-21	soc/intel: convert XTAL frequency constant to Kconfig	Michael Niewöhner
2020-10-21	soc/intel/common: add Kconfig for PM Timer emulation support	Michael Niewöhner
2020-10-16	include/cpu/x86: introduce new helper for (un)setting MSRs	Michael Niewöhner
2020-09-29	soc/intel/common: Add config option to enable TME/MKTME	Pratik Prajapati
2020-09-21	soc/intel: rename get_prmrr_size	Michael Niewöhner
2020-09-21	soc/intel/common/block/sgx: make PRMRR size setting depend on SGX	Michael Niewöhner
2020-09-16	soc/intel/common/block: Do not die if PRMRR size unsupported	Angel Pons
2020-09-15	soc/intel/common/block/cpu: Fix boot failure	Patrick Rudolph
2020-09-14	soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode	Aamir Bohra
2020-08-27	soc/intel/common: Add Elkhart Lake B0 CPU ID	Tan, Lean Sheng
2020-08-06	soc/intel/common/block/cpu: Refactor init_cpus function	Subrata Banik
2020-08-05	soc/intel/common: Include Alder Lake device IDs	Subrata Banik
2020-07-26	src/soc/intel: Add include <types.h>	Elyes HAOUAS
2020-07-03	soc/intel/common: Only touch Time Window Tau bits in supported SoCs	Tim Wawrzynczak
2020-07-01	soc/intel/common/cpu: Don't set any TCC settings if offset is 0	Tim Wawrzynczak
2020-06-28	soc/intel/common: add TCC activation functionality	Sumeet R Pawnikar
2020-06-25	drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1	Jonathan Zhang
2020-06-15	arch/x86: Remove NO_FIXED_XIP_ROM_SIZE	Kyösti Mälkki
2020-06-06	src: Remove unused 'include <cpu/x86/mtrr.h>'	Elyes HAOUAS
2020-06-06	soc/intel/tigerlake: Add CPU ID for TGL B0	Jamie Ryu
2020-06-01	soc/intel/common/block: Remove unused headers	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-05-01	src: Remove unused 'include <cpu/x86/cache.h>'	Elyes HAOUAS
2020-04-06	soc/intel/common: Use SPDX for GPL-2.0-only files	Angel Pons