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Age
Commit message (
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Author
2023-06-23
commonlib/console/post_code.h: Change post code prefix to POSTCODE
lilacious
2023-02-09
treewide: Remove repeated words
Elyes Haouas
2022-12-16
cpu/intel: Fix clearing MTRR for clang 64bit
Arthur Heymans
2022-11-23
soc/intel/common: Define post codes
Martin Roth
2022-09-06
src: remove force-included header rules.h from individual files
Martin Roth
2022-07-09
*/fsp/exit_car: Push stack address into %esp
Arthur Heymans
2022-04-01
arch/x86/postcar: Use a separate stack for C execution
Arthur Heymans
2021-12-13
soc/intel/common/block/cpu/car/exit_car_fsp.S: Align stack
Arthur Heymans
2021-11-18
drivers/fsp: Rewrite post code hex values in lowercase
Sean Rhodes
2021-10-05
src/soc to src/superio: Fix spelling errors
Martin Roth
2021-08-16
soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS Kconfig
Subrata Banik
2021-08-15
soc/intel/common: Calculate and configure SF Mask 1
Subrata Banik
2021-08-15
soc/intel/common: Calculate and configure SF Mask 2
Subrata Banik
2021-07-24
soc/intel/common/block: Add space before comment delimiter
Subrata Banik
2021-07-14
soc/intel/common: Use SPR for backing up data way and eviction mask
Subrata Banik
2021-06-26
soc/intel/cache_as_ram.S: Fix CAR issues with Bootguard
Arthur Heymans
2021-06-24
soc/intel/cache_as_ram.S: Fix SOC_INTEL_APOLLOLAKE
Arthur Heymans
2021-06-24
soc/intel/cache_as_ram.S: Add macro to detect bootguard nem
Arthur Heymans
2021-06-22
soc/intel/car: Add support for bootguard CAR
Arthur Heymans
2021-06-22
soc/intel/common/cache_as_ram.S: Add macro to clear CAR
Arthur Heymans
2021-06-22
soc/intel/common/cache_as_ram.S: Add macro to find a free MTRR
Arthur Heymans
2021-06-18
soc/intel/car/cache_as_ram.S: Fix typo in comment
Arthur Heymans
2021-05-05
drivers/intel/fsp2_0: Fix the FSP-T position
Arthur Heymans
2021-03-11
soc/intel/common/block/cpu: Use tab instead of space
Subrata Banik
2021-03-05
soc/intel/common/block/cpu: Use tab instead of space
Subrata Banik
2021-01-07
arch/x86: Move prologue to .init section
Kyösti Mälkki
2020-12-14
src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL
Shreesh Chhabbi
2020-12-14
soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option
Shreesh Chhabbi
2020-12-08
soc/intel/common/block/cpu/car: Fix two whitespace issues
Subrata Banik
2020-12-01
soc/intel/common/block/cpu/car/exit_car: Fix compilation on x86_64
Patrick Rudolph
2020-12-01
soc/intel/common/block/cpu/car/cache_as_ram: Add x86_64 support
Patrick Rudolph
2020-11-02
soc/intel/fsp-car: Use the coreboot defined stack
Arthur Heymans
2020-11-02
drivers/intel/fsp2_0: Add function to report FSP-T output
Arthur Heymans
2020-09-14
soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode
Aamir Bohra
2020-06-06
src: Remove unused 'include <cpu/x86/mtrr.h>'
Elyes HAOUAS
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-06
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-01
src: Remove unused 'include <cpu/x86/cache.h>'
Elyes HAOUAS
2020-04-06
soc/intel/common: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-18
soc: Remove copyright notices
Patrick Georgi
2019-11-15
soc/intel/common: Make alignment proper for comments
Subrata Banik
2019-11-12
arch/x86/car.ld: Rename suffix _start/_end
Arthur Heymans
2019-09-11
arch/x86: Restrict use of _car_global[start|end]
Kyösti Mälkki
2019-08-12
soc/intel/common: Fix typo mistake in cache_as_ram.S
Subrata Banik
2019-04-21
cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset
Arthur Heymans
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-01-08
arch/x86: Link walkcbfs.S instead of including it
Arthur Heymans
2018-10-25
soc/intel: Consolidate FSP CAR setup and teardown code
Praveen hodagatta pranesh
2018-10-11
src: Move common IA-32 MSRs to <cpu/x86/msr.h>
Elyes HAOUAS
2018-06-04
src/soc: Get rid of whitespace before tab
Elyes HAOUAS
2018-04-25
soc/intel/common: disable paging if PAGING_IN_CACHE_AS_RAM enabled
Aaron Durbin
2018-02-20
src/soc: Fix various typos
Jonathan Neuschäfer
2017-10-16
intel/common: CAR setup CQOS
Naresh G Solanki
2017-06-29
arch/x86: update assembly to ensure 16-byte alignment into C
Aaron Durbin
2017-03-28
soc/intel/common/block: Add cache as ram init and teardown code
Subrata Banik