| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-09-13 | soc/intel/cannonlake: Add ramstage uart debug support | Lijian Zhao |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |
|
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |
| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-09-13 | soc/intel/cannonlake: Add ramstage uart debug support | Lijian Zhao |