| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-04-18 | soc/intel/cnl: Generate DMAR ACPI table | John Zhao |
| 2019-01-17 | soc/intel/cannonlake: drop extra newline | Patrick Georgi |
| 2019-01-16 | soc/intel/cannonlake: Add processor power limits control support | Sumeet Pawnikar |
| 2018-11-16 | src: Remove unneeded include <console/console.h> | Elyes HAOUAS |
| 2018-02-20 | src/soc: Fix various typos | Jonathan Neuschäfer |
| 2017-12-02 | soc/intel/cannonlake: Initialize PMC controller | Subrata Banik |
| 2017-08-09 | soc/intel/cannonlake: Add ramstage SystemAgent support | Lijian Zhao |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |