| Age | Commit message (Expand) | Author |
|---|
| 2020-09-21 | src/soc/intel: Drop unneeded empty lines | Elyes HAOUAS |
| 2020-08-07 | soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASE | Subrata Banik |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-05-01 | soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND register | Elyes HAOUAS |
| 2020-04-06 | soc/intel/cannonlake: Use SPDX for GPL-2.0-only files | Angel Pons |
| 2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
| 2020-02-17 | soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774 | Wim Vervoorn |
| 2020-02-17 | soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is set | Wim Vervoorn |
| 2019-12-26 | soc/intel/cannonlake: Refactor pch_early_init() code | Usha P |
| 2019-12-03 | soc/intel/cannonlake: Configure GPIO PM configuration in bootblock | Subrata Banik |
| 2019-10-31 | soc/intel/{cnl,icl,skl}: Fix multiple whitespace issue | Subrata Banik |
| 2019-08-16 | soc/intel/cannonlake: Add 4E/4F to early io init | Christian Walter |
| 2019-05-22 | post_code: add post code for hardware initialization failure | Keith Short |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-03-04 | device/mmio.h: Add include file for MMIO ops | Kyösti Mälkki |
| 2019-03-01 | device/pci: Fix PCI accessor headers | Kyösti Mälkki |
| 2019-01-10 | soc/intel/common/block: Move tco common functions into block/smbus | Subrata Banik |
| 2018-12-19 | soc: Remove useless include <device/pci_ids.h> | Elyes HAOUAS |
| 2018-11-21 | soc/intel/cannonlake: Fix IO decode setup | Duncan Laurie |
| 2018-08-30 | soc/intel/cannonlake: Update PMC base address for CNP H and LP | Maulik V Vaghela |
| 2018-08-20 | soc/intel/common/block: Move common uart function to block/uart | Subrata Banik |
| 2018-06-28 | soc/intel/common/block: Move p2sb common functions into block/p2sb | Subrata Banik |
| 2018-06-14 | src: Use of device_t is deprecated | Elyes HAOUAS |
| 2018-01-25 | soc/intel/cannonlake: enable pch link in bootblock | Caveh Jalali |
| 2018-01-16 | soc/intel/cannonlake: Program DMI PCR settings | Lijian Zhao |
| 2018-01-10 | soc/intel/cannonlake: Add a call to gspi_early_bar_init in bootblock | Furquan Shaikh |
| 2018-01-05 | soc/intel/cannonlake: Correct PMC/GPIO routing information | Lijian Zhao |
| 2017-10-19 | soc/intel/cannonlake: Fix HECI error on reset | Lijian Zhao |
| 2017-10-18 | soc/intel/cannonlake: Use EBDA area to store cbmem_top address | Subrata Banik |
| 2017-08-21 | soc/intel/cannonlake: Enable common PMC code for CNL | Lijian Zhao |
| 2017-08-07 | soc/intel/cannonlake: Add memory map support | Lijian Zhao |
| 2017-07-18 | soc/intel/cannonlake: Fix Build break | Lijian Zhao |
| 2017-07-13 | soc/intel/cannonlake: Add bootblock PCH | Andrey Petrov |
