Age | Commit message (Expand) | Author |
2018-01-24 | soc/intel/cannonlake: Add child CARD device into eMMC/SD controller | Subrata Banik |
2018-01-24 | soc/intel/cannonlake: Port SD Controller W/A from Intel Reference code | Subrata Banik |
2018-01-24 | soc/intel/cannonlake: Port eMMC controller W/A from Intel Reference code | Subrata Banik |
2017-12-13 | src/soc/intel/cannonlake: Add _PRW for CNVi | Bora Guvendik |
2017-11-23 | soc/intel/cannonlake: Add PM methods to power gate SD card controller | Vaibhav Shankar |
2017-11-20 | soc/intel/cannonlake: Add ACPI workaround for EMMC | Lijian Zhao |
2017-11-17 | soc/intel/cannonlake: Add cpu.asl file | Shaunak Saha |
2017-11-15 | soc/intel/cannonlake: Fix and clean up xhci ACPI code | Vaibhav Shankar |
2017-10-20 | soc/intel/cannonlake: Add platform.asl | Lijian Zhao |
2017-10-12 | soc/intel/cannonlake: add length information for communities | Bora Guvendik |
2017-10-12 | soc/intel/cannonlake: Add ACPI platform sleep capability | Vaibhav Shankar |
2017-10-05 | soc/intel/cannonlake: Add all the SOC level DSDT tables | Lijian Zhao |
2017-10-03 | soc/intel/cannonlake: add initial ASL methods for SCS, GPIO | Bora Guvendik |
2017-10-03 | soc/intel/cannonlake: Add northbridge dsdt table | Lijian Zhao |
2017-09-19 | soc/intel/cannonlake: Add PCIE IRQs | Bora Guvendik |
2017-09-13 | soc/intel/cannonlake: Add common ACPI support for CNL | Lijian Zhao |