coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-05-22	soc/intel/cannonlake: Dump ME f/w version and status information	Tim Wawrzynczak
2019-04-16	soc/intel/cannonlake: Implement soc side VMX support	Ronak Kanabar
2019-03-07	soc/intel/cannonlake: Add support for logging wake source in SMM	V Sowmya
2019-02-04	soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT Kconfig	Subrata Banik
2019-01-12	soc/intel/cannonlake: Hook up Microcode	Lijian Zhao
2019-01-09	soc/intel: Clean mess around UART_DEBUG	Nico Huber
2019-01-08	soc/intel/cannonlake: Add chipset event logging	Duncan Laurie
2018-11-02	soc/intel: Enable GPIO functions in verstage	Duncan Laurie
2018-10-17	soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions	praveen hodagatta pranesh
2018-10-12	drivers/intel/fsp2_0: Hook up IntelFSP repo	Patrick Georgi
2018-10-04	soc/intel/cannonlake: Move the FSP related callbacks to separate files	Rizwan Qureshi
2018-08-28	soc/intel/cannonlake: Change LPDDR4 to MEMCFG	Lijian Zhao
2018-08-10	drivers/i2c: Add i2c TPM support for different stages	Philipp Deppenwiese
2018-08-03	soc/intel/coffeelake: Add initial coffeelake support	Lijian Zhao
2018-06-28	soc/intel/common/block: Move p2sb common functions into block/p2sb	Subrata Banik
2018-06-06	soc/intel/common/block: Add common chip config block	Subrata Banik
2018-01-25	soc/intel/cannonlake: enable pch link in bootblock	Caveh Jalali
2018-01-23	mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker amp	N, Harshapriya
2018-01-23	soc/intel/cannonlake: Add audio NHLT support	Lijian Zhao
2018-01-16	soc/intel/cannonlake: Program DMI PCR settings	Lijian Zhao
2018-01-07	soc/intel/cannonlake: provide LPDDR4 memory init	Nick Vaccaro
2017-12-09	soc/intel/cannonlake: Clean up UART code	Aamir Bohra
2017-11-11	soc/intel/cannonlake: Make use of Intel SPI common block	Subrata Banik
2017-11-04	soc/intel/cannonlake: Install common i2c	Lijian Zhao
2017-11-01	soc/intel/cannonlake: Use SCS common code	Bora Guvendik
2017-10-19	soc/intel/cannonlake: Add IGD Support and pre-OS display code	Abhay Kumar
2017-10-18	soc/intel/cannonlake: Add finalize function	Lijian Zhao
2017-10-03	soc/intel/cannonlake: Fill the SMI usage	Lijian Zhao
2017-10-03	soc/intel/cannonlake: Add lpc pci driver	Lijian Zhao
2017-09-20	soc/intel/cannonlake: Add PMC pci drivers	Lijian Zhao
2017-09-13	soc/intel/cannonlake: Add ramstage uart debug support	Lijian Zhao
2017-09-13	soc/intel/cannonlake: Add common ACPI support for CNL	Lijian Zhao
2017-09-06	soc/intel/cannonlake: remove duplicate uart.c from bootblock	Nick Vaccaro
2017-09-06	soc/intel/cannonlake: Add Vboot/ChromeOS support	Lijian Zhao
2017-09-01	soc/intel/cannonlake: add *spi.c files to make	Nick Vaccaro
2017-09-01	soc/intel/cannonlake: add gpio files to make	Nick Vaccaro
2017-08-25	soc/intel/cannonlake: Init UPD params based on config	Pratik Prajapati
2017-08-24	soc/intel/cannonlake: Add cpu.c and MP init support	Pratik Prajapati
2017-08-21	soc/intel/cannonlake: Enable common PMC code for CNL	Lijian Zhao
2017-08-17	soc/intel/cannonlake: Add SPI flash controller driver	Lijian Zhao
2017-08-15	soc/intel/cannonlake: Call into FSP siliconinit	Lijian Zhao
2017-08-15	soc/intel/cannonlake: Add postcar stage support	Lijian Zhao
2017-08-09	soc/intel/cannonlake: Add ramstage SystemAgent support	Lijian Zhao
2017-08-07	soc/intel/cannonlake: Add memory map support	Lijian Zhao
2017-07-21	Revert "soc/intel/cannonlake: Add postcar stage support"	Martin Roth
2017-07-21	Revert "soc/intel/cannonlake: Call into FSP siliconinit"	Martin Roth
2017-07-21	soc/intel/cannonlake: Call into FSP siliconinit	Lijian Zhao
2017-07-21	soc/intel/cannonlake: Add postcar stage support	Lijian Zhao
2017-07-19	soc/intel/cannonlake: Add minimal changes to call FSP Memoryinit	Lijian Zhao
2017-07-19	soc/intel/cannonlake: Add microcode support	Lijian Zhao
2017-07-13	soc/intel/cannonlake: Add Makefile	Andrey Petrov
2017-06-29	soc/intel/cannonlake: Add initial dummy directory	Lijian Zhao