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Commit message (
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Author
2017-10-11
soc/intel/cannonlake: Change default UART number to 2
Lijian Zhao
2017-10-06
soc/intel/cannonlake: Enable MRC cache
Lijian Zhao
2017-10-06
soc/intel/cannonlake: reduce bootblock size
Aaron Durbin
2017-10-03
soc/intel/cannonlake: Fill the SMI usage
Lijian Zhao
2017-10-03
soc/intel/cannonlake: Add lpc pci driver
Lijian Zhao
2017-09-27
soc/intel/cannonlake: Add FSP GOP support
Abhay kumar
2017-09-13
soc/intel/cannonlake: Add common ACPI support for CNL
Lijian Zhao
2017-09-06
soc/intel/cannonlake: Add Vboot/ChromeOS support
Lijian Zhao
2017-09-01
soc/intel/cannonlake: Define Max PCIE Root Ports
Pratik Prajapati
2017-09-01
soc/intel/cannonlake: add gpio files to make
Nick Vaccaro
2017-09-01
soc/intel/canonlake: Enable LPSS UART in 32bit PCI mode
Lijian Zhao
2017-08-30
soc/intel/{cannonlake,skylake}: Add active default value for UART_FOR_CONSOLE
Subrata Banik
2017-08-25
soc/intel/cannonlake: Init UPD params based on config
Pratik Prajapati
2017-08-24
soc/intel/cannonlake: Add cpu.c and MP init support
Pratik Prajapati
2017-08-21
soc/intel/cannonlake: Enable common PMC code for CNL
Lijian Zhao
2017-08-21
soc/intel/cannonlake: Add Kconfig option to select UART index
Subrata Banik
2017-08-17
soc/intel/cannonlake: Add SPI flash controller driver
Lijian Zhao
2017-08-15
soc/intel/cannonlake: Add postcar stage support
Lijian Zhao
2017-08-11
soc/cannonlake: Enable SMM code for Cannon Lake
Brandon Breitenstein
2017-08-03
soc/intel/cannonlake: Sort Kconfig for Cannonlake
Lijian Zhao
2017-07-21
Revert "soc/intel/cannonlake: Add postcar stage support"
Martin Roth
2017-07-21
soc/intel/cannonlake: Add postcar stage support
Lijian Zhao
2017-07-20
soc/intel/cannonlake: Make ramstage relocatable
Lijian Zhao
2017-07-19
soc/intel/cannonlake: Add microcode support
Lijian Zhao
2017-07-18
soc/intel/cannonlake: Use common GPIO driver
Andrey Petrov
2017-07-13
soc/intel/cannonlake: Add early CPU initialization
Andrey Petrov
2017-06-29
soc/intel/cannonlake: Add initial dummy directory
Lijian Zhao
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