coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-01-30	soc/intel/{baytrail,broadwell} Fix building with refcode blobs	Angel Pons
2021-01-29	soc/intel/baytrail,broadwell: Use resume_from_stage_cache()	Kyösti Mälkki
2020-07-14	src: Drop unused <cpu/x86/tsc.h> include	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-04-06	soc/intel/broadwell: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2018-11-16	src: Get rid of duplicated includes	Elyes HAOUAS
2017-03-17	soc/intel/broadwell: Fix {}, () and conditional issues	Lee Leahy
2016-07-15	soc/intel/broadwell: use common Intel ACPI hardware definitions	Aaron Durbin
2015-12-10	lib: remove assets infrastructure	Aaron Durbin
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-06-23	intel/broadwell: Fix refcode handling	Patrick Georgi
2015-06-02	assets: abstract away the firmware assets used for booting	Aaron Durbin
2015-06-02	cbfs: new API and better program loading	Aaron Durbin
2015-05-29	intel/broadwell: Hide use of acpi_slp_type	Kyösti Mälkki
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-13	baytrail: broadwell: correct refcode loading	Aaron Durbin
2015-04-22	coreboot: common stage cache	Aaron Durbin
2015-04-10	Broadwell: Set boot_mode of pei_data before running reference code	Kenji Chen
2015-04-07	broadwell: Change all SoC headers to <soc/headername.h> system	Julius Werner
2015-04-03	rmodule: use struct prog while loading rmodules	Aaron Durbin
2015-03-30	broadwell: fix HAVE_REFCODE_BLOB build errors	Aaron Durbin
2015-03-10	ACPI: Get S3 resume state from romstage_handoff	Kyösti Mälkki
2014-11-09	src: Too many terminators ';;' at end of stmts, stop Skynet	Edward O'Callaghan
2014-10-22	broadwell: add new intel SOC	Duncan Laurie