| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-04-16 | lynxpoint/broadwell: Correct L1 exit latency with ASPM | Angel Pons |
| 2024-04-14 | lynxpoint/broadwell: Correct PCH-LP PCIe ASPM check | Angel Pons |
| 2023-02-01 | treewide: Remove duplicated include <device/pci.h> | Elyes Haouas |
| 2022-11-30 | /: Remove extra space after comma | Elyes Haouas |
| 2022-03-07 | src: Make PCI ID define names shorter | Felix Singer |
| 2022-01-04 | sb/intel: Use `bool` for PCIe coalescing option | Angel Pons |
| 2021-10-15 | soc/intel/broadwell/pcie.c: Simplify AND-mask | Angel Pons |
| 2021-05-20 | soc/intel/broadwell: Use Lynx Point IOBP code | Angel Pons |
| 2021-03-15 | pciexp_device: Rewrite LTR configuration | Nico Huber |
| 2021-03-12 | device: Give `pci_ops.set_L1_ss_latency` a proper name | Nico Huber |
| 2021-02-15 | soc/intel/broadwell/pch: Prepare to drop `gpio.h` | Angel Pons |
| 2021-02-10 | soc/intel/broadwell/pch: Simplify PCI RMW operations | Angel Pons |
| 2021-01-24 | soc/intel/broadwell: Use Haswell CPU headers | Angel Pons |
| 2020-10-30 | soc/intel/broadwell: Move PCH code into pch subdir | Angel Pons |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |