coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-10-25	soc/intel/broadwell: Drop `broadwell_pci_ops`	Angel Pons
2020-10-14	soc/intel/broadwell: Align cosmetics with Haswell/Lynx Point	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-01	soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-04-06	soc/intel/broadwell: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-12-26	soc/broadwell/minihd: correct vendor, subsystem IDs	Matt DeVillier
2019-12-19	src/soc/intel: Remove unused <stdlib.h>	Elyes HAOUAS
2019-07-22	soc/intel/broadwell: Change variable back to u32	Jacob Garber
2019-04-06	src: Use include <delay.h> when appropriate	Elyes HAOUAS
2019-03-04	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki
2016-12-07	soc/broadwell: set EM4/EM5 registers based on cdclk	Matt DeVillier
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-07	broadwell: Change all SoC headers to <soc/headername.h> system	Julius Werner
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-10-22	broadwell: add new intel SOC	Duncan Laurie