| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-12-19 | soc: Remove useless include <device/pci_ids.h> | Elyes HAOUAS |
| 2016-05-04 | broadwell/me: Fix out-of-bounds array access error | Evan Lojewski |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-07 | broadwell: Change all SoC headers to <soc/headername.h> system | Julius Werner |
| 2015-04-04 | broadwell: Fix building with USE=quiet-cb | Duncan Laurie |
| 2015-04-02 | broadwell: me: Fix typo and add missing phase state | Duncan Laurie |
| 2015-03-27 | broadwell: Read and save HSIO version from ME in romstage | Duncan Laurie |
| 2014-12-08 | intel/broadwell: Spelling fixes | Martin Roth |
| 2014-10-22 | broadwell: ACPI, romstage, and other updates | Duncan Laurie |
| 2014-10-22 | broadwell: add new intel SOC | Duncan Laurie |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |