index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
braswell
/
cpu.c
Age
Commit message (
Expand
)
Author
2017-11-23
Constify struct cpu_device_id instances
Jonathan Neuschäfer
2017-09-11
cpu/x86/mp_init: remove adjust_cpu_apic_entry()
Aaron Durbin
2017-03-17
soc/intel/braswell: Fix most of the issues detected by checkpatch
Lee Leahy
2016-05-06
soc/intel/braswell: convert to using common MP and SMM init
Aaron Durbin
2016-05-02
cpu/x86/mp_init: remove unused callback arguments
Aaron Durbin
2016-03-08
x86 chipsets: utilize x86_setup_mtrrs_with_detect()
Aaron Durbin
2016-01-14
soc/braswell: Add CPUID for D0 stepping
Divya Sasidharan
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-27
FSP 1.1: Move common FSP code
Lee Leahy
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-08-29
intel/braswell: allow dirty cache line evictions for SMRAM to stick
Chiranjeevi Rapolu
2015-07-06
Braswell: Update to end of June.
Lee Leahy
2015-06-25
Braswell: Add Braswell SOC support
Lee Leahy
2015-05-28
Remove address from GPLv2 headers
Patrick Georgi
2015-05-23
Braswell: Use Baytrail as Comparison Base
Lee Leahy