index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
braswell
/
acpi
/
scc.asl
Age
Commit message (
Expand
)
Author
2023-02-17
treewide: Remove unuseful "_ADR: Address" comment
Elyes Haouas
2022-12-27
tree/acpi: Replace constant "Zero" with actual number
Felix Singer
2022-12-23
tree: Replace And(a,b,c) with ASL 2.0 syntax
Felix Singer
2022-12-23
tree: Replace Or(a,b,c) with ASL 2.0 syntax
Felix Singer
2022-12-14
soc/intel/braswell/acpi: Replace Store(a,b) with ASL 2.0 syntax
Felix Singer
2022-12-12
soc/intel/braswell/acpi: Replace LEqual(a,b) with ASL 2.0 syntax
Felix Singer
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-06
soc/intel/braswell: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-18
soc: Remove copyright notices
Patrick Georgi
2018-03-08
soc/intel/braswell: add ACPI for eMMC/SD devices in PCI mode
Matt DeVillier
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-25
Braswell: Add Braswell SOC support
Lee Leahy
2015-05-28
Remove address from GPLv2 headers
Patrick Georgi
2015-05-23
Braswell: Use Baytrail as Comparison Base
Lee Leahy