| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-06-08 | soc/intel/alderlake: Correct TCSS XHCI Port status offset | Sridhar Siricilla |
| 2021-02-24 | soc/intel/alderlake: Add soc_get_xhci_usb_info() for elog support | Tim Wawrzynczak |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |