summaryrefslogtreecommitdiff
path: root/src/soc/intel/alderlake/include
AgeCommit message (Expand)Author
2021-07-05soc/intel/alderlake: Correct Bus and Device of Touch Host ControllerVarshit B Pandya
2021-06-30soc/intel/common: Move PMC EPOC related code to Intel common codeLean Sheng Tan
2021-06-29soc/intel/alderlake: Enable support for common IRQ blockTim Wawrzynczak
2021-06-24soc/intel/alderlake: Update mainboard_memory_init_params() argumentSubrata Banik
2021-06-17soc/intel/{alderlake,tigerlake}: Fix typo in pmc.hWerner Zeh
2021-05-26soc/intel/alderlake: Add validity for TBT firmware authenticationJohn Zhao
2021-05-25soc/intel/alderlake: Fix SA_DEVFN_CPU_PCIE6_*Tim Wawrzynczak
2021-05-18soc/intel/alderlake: mb/intel/sm: Add tcss codeDeepti Deshatty
2021-05-14soc/intel/alderlake: Add known CPU Port IDs for GPIO communitiesDeepti Deshatty
2021-05-14soc/intel/alderlake: Add IOM PCR PIDDeepti Deshatty
2021-05-10soc/intel/adl: Allow mainboard to fill CmdMirror and DqDqsRetrainingMaulik V Vaghela
2021-05-06soc/intel/alderlake: Add CrashLog implementation for Intel ADLFrancois Toguo
2021-05-05soc/intel/alderlake: Add GPIO definition for CPU PCIe vGPIOMaulik V Vaghela
2021-04-16soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OCMaulik V Vaghela
2021-03-27soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik
2021-03-27soc/intel/alderlake: Correct GPE DWx assignment as per EDSSubrata Banik
2021-03-26soc/intel/alderlake: Add provision to override Rcomp settingsSubrata Banik
2021-03-26soc/intel/alderlake: Align RcompResistor definition as per MRCSubrata Banik
2021-03-15soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI deviceCliff Huang
2021-03-03soc/intel/alderlake: Add some helper macros for accessing TCSS DMA devicesTim Wawrzynczak
2021-03-01soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons
2021-03-01soc/intel: Drop `romstage_pch_init()` functionAngel Pons
2021-03-01soc/intel: Factor out common smbus.hAngel Pons
2021-03-01soc/intel: Factor out common gpe.hAngel Pons
2021-02-17soc/intel/alderlake: Fix PCI IRQ tablesTim Wawrzynczak
2021-02-16soc/intel: Drop aliases on MMCONF_BASE_ADDRESSKyösti Mälkki
2021-01-30soc/intel/alderlake: Remove pch.h from SoC directorySubrata Banik
2021-01-25soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driverFurquan Shaikh
2021-01-18soc/intel/alderlake: Update PCH and CPU PCIe RP tableEric Lai
2020-12-23soc/intel/alderlake: Add SPI DMI Destination IDSubrata Banik
2020-11-29soc/intel/alderlake: Add lp5_ccc_config to the board memory configurationSridhar Siricilla
2020-10-29mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'Subrata Banik
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-21soc/intel: convert XTAL frequency constant to KconfigMichael Niewöhner
2020-10-06soc/intel/alderlake/ramstage: Fix compilation issueSubrata Banik
2020-10-05soc: move mainboard_get_dram_part_num prototype to memory_info.hNick Vaccaro
2020-10-05mb, soc: change mainboard_get_dram_part_num() prototypeNick Vaccaro
2020-10-03soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik
2020-09-27soc/intel/alderlake: Add GPIOs for Alder Lake SOCSubrata Banik
2020-09-15soc/intel/alderlake/romstage: Do initial SoC commit till romstageSubrata Banik
2020-09-10soc/intel/alderlake: Rename pch_init() codeSubrata Banik
2020-09-05soc/intel/alderlake/bootblock: Do initial SoC commit till bootblockSubrata Banik