| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-04-11 | soc/intel/alderlake/{chipset.cb,chipset_pch_s.cb}: Set P2SB as hidden | Michał Żygowski |
| 2022-07-29 | soc/intel/alderlake: Add missing TDP and Power Limits for ADL-S | Michał Żygowski |
| 2022-06-30 | soc/intel/alderlake: add chipset devicetree for ADL-S | Michał Kopeć |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |