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path: root/src/soc/intel/alderlake/chip.h
AgeCommit message (Expand)Author
2021-06-16soc/intel/alderlake/romstage: Update display UPDs based on InternalGfxSubrata Banik
2021-06-07soc/intel/adl: Add SKU specific power limits supportSumeet Pawnikar
2021-05-18soc/intel/alderlake: mb/intel/sm: Add tcss codeDeepti Deshatty
2021-05-04soc/intel/alderlake: remove duplicate PL2 overrideSumeet R Pawnikar
2021-04-22soc/intel/alderlake: Add enum for HDA audio configurationSugnan Prabhu S
2021-04-22soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.hFurquan Shaikh
2021-04-21soc/intel/alderlake: Drop unused `PrmrrSize` from devicetreeAngel Pons
2021-04-16soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OCMaulik V Vaghela
2021-04-10soc/intel/alderlake: Drop unreferenced `InternalGfx`Angel Pons
2021-03-28soc/intel/alderlake: add processor power limits control supportSumeet R Pawnikar
2021-03-15soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entryCliff Huang
2021-03-03soc/intel: Retype `CnviBtAudioOffload` devicetree optionAngel Pons
2021-02-05soc/intel/alderlake: Refactor PCIE port configEric Lai
2021-02-01soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQSubrata Banik
2021-01-30soc/intel/alderlake: Remove pch.h from SoC directorySubrata Banik
2021-01-18soc/intel/common: Move L1_substates_control to pcie_rp.hEric Lai
2021-01-10soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik
2020-12-14soc/intel/alderlake: Drop unreferenced devicetree settingsAngel Pons
2020-10-26mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner
2020-10-03soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik
2020-09-15soc/intel/alderlake/romstage: Do initial SoC commit till romstageSubrata Banik