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path: root/src/soc/intel/alderlake/chip.h
AgeCommit message (Expand)Author
2022-07-08soc/intel/adl: Add support to configure package c-state demotionV Sowmya
2022-07-04soc/intel/alderlake: RPL-P power limits and VR settingsJeremy Compostella
2022-06-30soc/intel/alderlake: add chipset devicetree for ADL-SMichał Kopeć
2022-06-26soc/intel/alderlake: Drop debug interface selectionSubrata Banik
2022-06-02soc/intel/alderlake: add power limits for Alder Lake-N SKUsVidya Gopalakrishnan
2022-05-25soc/intel/alderlake: Add chip config for DPA PreWakeleo.chou
2022-05-18soc/intel/alderlake: Add support enable external V1P05/Vnn railsV Sowmya
2022-04-27soc/intel/adl/chip.h: Rename max_dram_speed to include unitsScott Chao
2022-04-13soc/intel/alderlake: Allow mainboard to configure USB2 Phy power gatingSridhar Siricilla
2022-04-07soc/intel/alderlake: Hook up VrPowerDeliveryDesign to devicetreeLean Sheng Tan
2022-03-15soc/intel/alderlake: Allow mainboard to configure c1-state auto-demotionMAULIK V VAGHELA
2022-03-15soc/intel/adl/chip.h: Convert all camel case variables to snake caseMAULIK V VAGHELA
2022-03-14soc/intel/alderlake: Add EPP override supportCliff Huang
2022-03-09drivers/wifi,soc/intel/adl: Move CnviDdrRfim property to driversTim Wawrzynczak
2022-03-07src: Make PCI ID define names shorterFelix Singer
2022-02-21soc/intel/alderlake: Enable eMMC based on dev enabledKrishna Prasad Bhat
2022-01-25soc/intel/adl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik
2022-01-21soc/intel/alderlake: Add ADL-P 2+8+2 (28W) VR configCurtis Chen
2022-01-10soc/intel/alderlake: Update the ADL-P SKU parameters for VR domainsCurtis Chen
2021-12-03soc/intel/alderlake: Add the CnviDdrRfim configurationRonak Kanabar
2021-11-25soc/intel/alderlake: Add ADLP 4+4+2 power configurationsCurtis Chen
2021-11-18soc/intel/alderlake: Add Acoustic noise mitigation UPDsWisley Chen
2021-11-09soc/intel/alderlake: Enable Intel FIVR RFI settingsWisley Chen
2021-10-12soc/intel: replace dt option PmTimerDisabled by KconfigMichael Niewöhner
2021-10-04src/soc/intel/alderlake: Add PsysPmax settingRyan Lin
2021-10-01soc/intel/alderlake: add power limits for Alder Lake-M 282 SKUSumeet Pawnikar
2021-09-29soc/intel/alderlake: Add ADLP 242 power configurationsTracy Wu
2021-09-29soc/intel/alderlake: Add support for power cycle and SLP signal durationTim Wawrzynczak
2021-09-24soc/intel/alderlake: add MaxDramSpeed configCasper Chang
2021-09-10soc/intel/alderlake: Set LpmStateEnableMask UPDTim Wawrzynczak
2021-09-03soc/intel/alderlake: set power limits dynamically for thermalSumeet Pawnikar
2021-08-20soc/intel/adl: Update power limits for ADL-M SKUSumeet Pawnikar
2021-08-12soc/intel/alderlake: Configure the SKU specific parameters for VR domainsV Sowmya
2021-07-12soc/intel/alderlake: Set max Pkg C-states to AutoV Sowmya
2021-07-05soc/intel/alderlake: Add support to update the FIVR configsV Sowmya
2021-06-16soc/intel/alderlake/romstage: Update display UPDs based on InternalGfxSubrata Banik
2021-06-07soc/intel/adl: Add SKU specific power limits supportSumeet Pawnikar
2021-05-18soc/intel/alderlake: mb/intel/sm: Add tcss codeDeepti Deshatty
2021-05-04soc/intel/alderlake: remove duplicate PL2 overrideSumeet R Pawnikar
2021-04-22soc/intel/alderlake: Add enum for HDA audio configurationSugnan Prabhu S
2021-04-22soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.hFurquan Shaikh
2021-04-21soc/intel/alderlake: Drop unused `PrmrrSize` from devicetreeAngel Pons
2021-04-16soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OCMaulik V Vaghela
2021-04-10soc/intel/alderlake: Drop unreferenced `InternalGfx`Angel Pons
2021-03-28soc/intel/alderlake: add processor power limits control supportSumeet R Pawnikar
2021-03-15soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entryCliff Huang
2021-03-03soc/intel: Retype `CnviBtAudioOffload` devicetree optionAngel Pons
2021-02-05soc/intel/alderlake: Refactor PCIE port configEric Lai
2021-02-01soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQSubrata Banik
2021-01-30soc/intel/alderlake: Remove pch.h from SoC directorySubrata Banik
2021-01-18soc/intel/common: Move L1_substates_control to pcie_rp.hEric Lai
2021-01-10soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik
2020-12-14soc/intel/alderlake: Drop unreferenced devicetree settingsAngel Pons
2020-10-26mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner
2020-10-03soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik
2020-09-15soc/intel/alderlake/romstage: Do initial SoC commit till romstageSubrata Banik