coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2024-08-28	soc/intel/adl: Prevent unconditional legacy COM ports initialization	Subrata Banik
2024-07-18	soc/intel/alderlake: Switch to common eSPI header	Subrata Banik
2022-11-26	src/soc/intel: Remove unnecessary space after casts	Elyes Haouas
2022-06-30	soc/alderlake: Enable all bits for IO decode / enable register	Sean Rhodes
2022-04-20	soc/intel: clean up dmi driver code	Wonkyu Kim
2022-04-11	soc/intel/alderlake/bootblock/pch.c: Enable SIO 4e/4f ports decoding	Michał Żygowski
2022-02-01	soc/intel/alderlake: Add PMC register base for ADL-N	Usha P
2021-01-31	soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK	Michael Niewöhner
2021-01-30	soc/intel/alderlake: Remove pch.h from SoC directory	Subrata Banik
2021-01-25	soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring	Michael Niewöhner
2020-12-09	soc/intel/common/dmi: Move DMI defines into DMI driver header	Srinidhi N Kaushik
2020-11-29	soc/intel: Configure P2SB before other PCH controllers	Furquan Shaikh
2020-09-10	soc/intel/alderlake: Rename pch_init() code	Subrata Banik
2020-09-05	soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock	Subrata Banik