Age | Commit message (Expand) | Author |
2019-11-20 | Remove imgtec/pistachio SoC | Julius Werner |
2019-11-04 | arch/mips: Pass cbmem_top to ramstage via calling argument | Arthur Heymans |
2019-11-01 | lib/cbmem_top: Add a common cbmem_top implementation | Arthur Heymans |
2019-10-27 | src/soc: change "unsigned" to "unsigned int" | Martin Roth |
2019-09-19 | cpu,mb,soc: Init missing lb_serial struct fields | Jacob Garber |
2019-08-20 | arch/non-x86: Remove use of __PRE_RAM__ | Kyösti Mälkki |
2019-07-09 | arch/non-x86: Flip HAVE_MONOTONIC_TIMER default | Kyösti Mälkki |
2019-07-07 | arch/mips: Make MIPS specific options depend on ARCH_MIPS | Arthur Heymans |
2019-03-22 | arch/mips: Fix <arch/mmio.h> prototypes | Kyösti Mälkki |
2019-03-07 | src: Drop unused include <timestamp.h> | Elyes HAOUAS |
2019-03-07 | security/tpm: Fix TCPA log feature | Philipp Deppenwiese |
2019-03-04 | device/mmio.h: Add include file for MMIO ops | Kyösti Mälkki |
2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
2019-02-22 | symbols.h: Add macro to define memlayout region symbols | Julius Werner |
2018-11-21 | (console,drivers/uart)/Kconfig: Fix dependencies | Nico Huber |
2018-11-16 | src: Remove unneeded include <console/console.h> | Elyes HAOUAS |
2018-10-22 | soc/imgtech/pistachio: Convert to `board_reset()` | Nico Huber |
2018-10-08 | src: Use tabs for indentation | Elyes HAOUAS |
2018-06-04 | soc/imgtec/pistachio: Get rid of device_t | Elyes HAOUAS |
2018-04-23 | soc{broadcom,imgtec,mediatek,qualcomm}: stop using spi_xfer_two_vectors | Aaron Durbin |
2018-02-21 | driver/uart: Introduce a way for mainboard to override the baudrate | Julien Viard de Galbert |
2018-02-20 | src/soc: Fix various typos | Jonathan Neuschäfer |
2017-10-23 | soc: Add Kconfig for each soc vendor | Chris Ching |
2017-09-23 | mb/*/*: Remove rtc nvram configurable baud rate | Arthur Heymans |
2017-06-13 | Consolidate reset API, add generic reset_prepare mechanism | Julius Werner |
2017-06-07 | spi: Remove unused/unnecessary spi_init function definitions | Furquan Shaikh |
2017-05-24 | soc/imgtec/pistachio: Move spi driver to use spi_bus_map | Furquan Shaikh |
2017-05-05 | drivers/spi: Re-factor spi_crop_chunk | Furquan Shaikh |
2016-12-23 | spi: Get rid of SPI_ATOMIC_SEQUENCING | Furquan Shaikh |
2016-12-05 | spi: Define and use spi_ctrlr structure | Furquan Shaikh |
2016-12-05 | spi: Pass pointer to spi_slave structure in spi_setup_slave | Furquan Shaikh |
2016-12-05 | spi: Fix parameter types for spi functions | Furquan Shaikh |
2016-11-22 | spi: Get rid of max_transfer_size parameter in spi_slave structure | Furquan Shaikh |
2016-11-22 | spi: Clean up SPI flash driver interface | Furquan Shaikh |
2016-05-09 | drivers/uart: Use uart_platform_refclk for all UART models | Lee Leahy |
2016-04-21 | imgtec/pistachio: Fix memlayout ASSERT with new binutils | Stefan Reinauer |
2016-02-22 | urara: Increase bootblock size | Julius Werner |
2016-02-12 | tegra132/pistachio: Increase romstage size in memlayout.ld | Julius Werner |
2015-12-31 | imgtec/pistachio: disable default RPU gate register values | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: memlayout: update GRAM size | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: I2C: fix base address for I2C clock setup | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: identity map SOC registers region | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: Add SOC_REGISTERS memory region | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: Use SYS PLL in integer mode | Ionela Voinescu |
2015-12-29 | mips: add coherency argument to identity mapping | Ionela Voinescu |
2015-12-27 | mainboard/google/urara: change SYS PLL to 700MHz | Ionela Voinescu |
2015-12-21 | imgtec/pistachio: DDR2, DDR3: DLL reset set | Ionela Voinescu |
2015-12-21 | imgtec/pistachio: DDR2, DDR3: DQS gate early | Ionela Voinescu |
2015-12-21 | imgtec/pistachio: increase CBFS cache | Ionela Voinescu |
2015-12-17 | Drop src/cpu/ indirection for MIPS | Stefan Reinauer |
2015-12-17 | soc/imgtec/pistachio: add implementation for system reset | Ionela Voinescu |
2015-12-17 | soc/imgtec/pistachio: Implement hard_reset() | Stefan Reinauer |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-09-22 | linking: link bootblock.elf with .data and .bss sections again | Aaron Durbin |
2015-09-09 | verstage: use common program.ld for linking | Aaron Durbin |
2015-08-31 | imgtec/pistachio: remove timestamp_get() implementation | Aaron Durbin |
2015-08-09 | imgtech/pistacho: Add vboot2 memory region | Patrick Georgi |
2015-06-24 | Remove address from GPLv2 headers | Patrick Georgi |
2015-06-21 | Remove old HAVE_UART_MEMORY_MAPPED select statements | Martin Roth |
2015-06-12 | pistachio: add DDR3 initialization code | Ionela Voinescu |
2015-06-12 | pistachio: Use passive windowing as DQS gating scheme | Ionela Voinescu |
2015-06-10 | pistachio: sort included header files | Ionela Voinescu |
2015-06-10 | pistachio: initialize cbmem area to be empty | Ionela Voinescu |
2015-06-09 | pistachio: increase romstage size | Ionela Voinescu |
2015-06-02 | Revert "pistashio: bump up romstage size" | Aaron Durbin |
2015-05-26 | pistashio: bump up romstage size | Aaron Durbin |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-05-19 | Remove Kconfig variable that has no effect | Patrick Georgi |
2015-05-07 | imgtec/pistachio: Add comment on the unusual memory layout | Patrick Georgi |
2015-04-30 | imgtech/pistachio: Give some more space to the bootblock | Patrick Georgi |
2015-04-29 | kbuild: automatically include SOCs | Stefan Reinauer |
2015-04-22 | imgtec/pistachio: DDR reads return to controller with no bubbles | Ionela Voinescu |
2015-04-22 | imgtec/pistachio: DDR row/bank/column mapping | Ionela Voinescu |
2015-04-22 | soc: select generic gpio lib on (almost) all non-x86 SOCs | Stefan Reinauer |
2015-04-22 | imgtec/pistachio: increase RAM CBFS cache size | Vadim Bendebury |
2015-04-21 | pistachio: Remove 50% DDR bandwidth restriction | Ionela Voinescu |
2015-04-21 | pistachio: Decrease DDR ODT from 75R to 50R | Ionela Voinescu |
2015-04-21 | pistachio: clean DDR2 initialization code | Ionela Voinescu |
2015-04-21 | pistachio: add clock setup for all I2C interfaces | Ionela Voinescu |
2015-04-21 | urara: Identity map DRAM/SRAM | Andrew Bresticker |
2015-04-21 | imgtec/pistachio: Add spi_crop_chunk() | Patrick Georgi |
2015-04-17 | pistachio: Move console UART to a Kconfig variable | David Hendricks |
2015-04-17 | pistachio: add DDR2 initialization code | Ionela Voinescu |
2015-04-17 | pistachio: report UART register width | Vadim Bendebury |
2015-04-17 | uart: pass register width in the coreboot table | Vadim Bendebury |
2015-04-14 | pistachio: implement clock setup for I2C0 | Ionela Voinescu |
2015-04-14 | pistachio: Fix ROM clock base address | Ionela Voinescu |
2015-04-14 | urara: add clock setup for MIPS CPU, ROM and Ethernet | Ionela Voinescu |
2015-04-14 | pistachio: fix clocks setup code | Ionela Voinescu |
2015-04-14 | pistachio: Use 1.8433179 MHz for UART refclk | David Hendricks |
2015-04-14 | pistachio: increase size of bootblock to 18 KB | Ionela Voinescu |
2015-04-14 | pistachio: change memory layout as to allow bigger CBFS cache | Ionela Voinescu |
2015-04-14 | pistachio: spi: use same clock edge for RX and TX | Ionela Voinescu |
2015-04-14 | urara: Configure clocks and MFIOs | Ionela Voinescu |
2015-04-14 | CBFS: Automate ROM image layout and remove hardcoded offsets | Julius Werner |
2015-04-13 | spi: support controllers with limited transfer size capabilities | Vadim Bendebury |
2015-04-13 | urara: add support for DMA coherent memory area | Ionela Voinescu |
2015-04-13 | pistachio: increase the size of romstage to 36K | Ionela Voinescu |
2015-04-09 | pistachio: add timer frequency for SOC; correct platform ID | Ionela Voinescu |
2015-04-09 | pistachio: add SOC descriptor | Vadim Bendebury |