summaryrefslogtreecommitdiff
path: root/src/soc/imgtec/pistachio/include
AgeCommit message (Expand)Author
2019-11-20Remove imgtec/pistachio SoCJulius Werner
2019-10-27src/soc: change "unsigned" to "unsigned int"Martin Roth
2019-03-22arch/mips: Fix <arch/mmio.h> prototypesKyösti Mälkki
2019-03-07security/tpm: Fix TCPA log featurePhilipp Deppenwiese
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-03-04arch/io.h: Drop unnecessary includeKyösti Mälkki
2016-04-21imgtec/pistachio: Fix memlayout ASSERT with new binutilsStefan Reinauer
2016-02-22urara: Increase bootblock sizeJulius Werner
2016-02-12tegra132/pistachio: Increase romstage size in memlayout.ldJulius Werner
2015-12-31imgtec/pistachio: disable default RPU gate register valuesIonela Voinescu
2015-12-31imgtec/pistachio: memlayout: update GRAM sizeIonela Voinescu
2015-12-31imgtec/pistachio: Add SOC_REGISTERS memory regionIonela Voinescu
2015-12-27mainboard/google/urara: change SYS PLL to 700MHzIonela Voinescu
2015-12-21imgtec/pistachio: DDR2, DDR3: DQS gate earlyIonela Voinescu
2015-12-21imgtec/pistachio: increase CBFS cacheIonela Voinescu
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-09-09verstage: use common program.ld for linkingAaron Durbin
2015-08-09imgtech/pistacho: Add vboot2 memory regionPatrick Georgi
2015-06-12pistachio: add DDR3 initialization codeIonela Voinescu
2015-06-10pistachio: sort included header filesIonela Voinescu
2015-06-09pistachio: increase romstage sizeIonela Voinescu
2015-06-02Revert "pistashio: bump up romstage size"Aaron Durbin
2015-05-26pistashio: bump up romstage sizeAaron Durbin
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-07imgtec/pistachio: Add comment on the unusual memory layoutPatrick Georgi
2015-04-30imgtech/pistachio: Give some more space to the bootblockPatrick Georgi
2015-04-22imgtec/pistachio: increase RAM CBFS cache sizeVadim Bendebury
2015-04-21pistachio: add clock setup for all I2C interfacesIonela Voinescu
2015-04-21urara: Identity map DRAM/SRAMAndrew Bresticker
2015-04-17pistachio: add DDR2 initialization codeIonela Voinescu
2015-04-14pistachio: implement clock setup for I2C0Ionela Voinescu
2015-04-14urara: add clock setup for MIPS CPU, ROM and EthernetIonela Voinescu
2015-04-14pistachio: increase size of bootblock to 18 KBIonela Voinescu
2015-04-14pistachio: change memory layout as to allow bigger CBFS cacheIonela Voinescu
2015-04-14urara: Configure clocks and MFIOsIonela Voinescu
2015-04-13urara: add support for DMA coherent memory areaIonela Voinescu
2015-04-13pistachio: increase the size of romstage to 36KIonela Voinescu
2015-04-09pistachio: add timer frequency for SOC; correct platform IDIonela Voinescu
2015-04-09pistachio: modify memory layoutVadim Bendebury
2015-04-09pistachio: implement timer supportVadim Bendebury
2015-04-07pistachio: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-02pistachio: add gpio type definitionVadim Bendebury