| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-02-26 | soc/cavium/cn81xx: Enable RNG for DRAM init | Patrick Rudolph |
| 2018-07-23 | soc/cavium: Enable DRAM test | Patrick Rudolph |
| 2018-07-10 | cavium: Add CN81xx SoC and eval board support | David Hendricks |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |