coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-10-21	soc/amd/*/uart: cleanup includes	Felix Held
2022-10-20	soc/amd/*/uart: commonize UART code and MMIO device driver	Felix Held
2022-10-20	soc/amd: move set_uart_config prototype to common UART header	Felix Held
2022-10-20	soc/amd/stoneyridge/uart: introduce and use soc_get_uart_ctrlr_info	Felix Held
2022-10-20	soc/amd/stoneyridge: initialize GPIOs for serial console	Felix Held
2022-10-20	soc/amd/stoneyridge/uart: add and use uart_info array	Felix Held
2021-01-14	soc/amd/stoneyridge: use SOC_AMD_COMMON_BLOCK_UART	Felix Held
2020-09-12	include/console/uart: make index parameter unsigned	Felix Held
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-05	soc/amd: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2017-10-16	soc/amd/stoneyridge: Check UART index	Marshall Dawson
2017-08-14	stoneyridge: Rename hudson to southbridge	Marc Jones
2017-06-27	soc/amd/stoneyridge: Fix most checkpatch errors	Marshall Dawson
2017-06-26	soc: Add AMD Stoney Ridge southbridge code	Marc Jones