| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-01-30 | soc/amd/stoneyridge: Access SMBUS through MMIO | Richard Spiegel |
| 2018-10-18 | soc/amd/stoneyridge: Remove "else" after a return | Richard Spiegel |
| 2017-12-12 | soc/amd/common: Move Agesa related headers | Richard Spiegel |
| 2017-11-20 | amd/stoneyridge: Fix SPD files and functions camel case | Marc Jones |
| 2017-11-14 | soc/amd/stoneyridge: Remove direct AGESA header includes | Martin Roth |
| 2017-11-10 | soc/amd/stoneyridge: Use uint8_t as type for SPD address | Richard Spiegel |
| 2017-11-10 | soc/amd/stoneyridge: Simplify and fix SMBUS code | Richard Spiegel |
| 2017-10-19 | soc/amd/stoneyridge: Replace magic registers | Richard Spiegel |
| 2017-10-04 | soc/amd/stoneyridge: Drop some amdlib.h includes | Kyösti Mälkki |
| 2017-08-14 | stoneyridge: Rename hudson to southbridge | Marc Jones |
| 2017-06-27 | soc/amd/stoneyridge: Fix most checkpatch errors | Marshall Dawson |
| 2017-06-26 | soc/amd/stoneyridge: Add northbridge support | Marc Jones |
| 2017-06-26 | soc: Add AMD Stoney Ridge southbridge code | Marc Jones |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |