| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-10-25 | soc/amd/stoneyridge: Remove "else" after a return | Richard Spiegel |
| 2018-10-18 | cpu/amd: Use common AMD's MSR | Elyes HAOUAS |
| 2018-09-11 | amd/stoneyridge: Set BERT region size when no TSEG used | Marshall Dawson |
| 2018-09-07 | amd/stoneyridge: Adjust memory map for reserved | Marshall Dawson |
| 2018-02-07 | amd/stoneyridge: Put stage cache into TSEG | Marshall Dawson |
| 2018-01-28 | amd/stoneyridge: Add NV storage to ramtop | Marshall Dawson |
| 2017-09-27 | amd/stoneyridge: Enable SMM in TSEG | Marshall Dawson |
| 2017-09-13 | amd/stoneyridge: Make cbmem_top SMM aware | Marshall Dawson |
| 2017-06-28 | soc/amd/stoneyridge: Enable early cbmem | Marshall Dawson |
| 2017-06-26 | soc/amd/stoneyridge: Add northbridge support | Marc Jones |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |