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Commit message (
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Author
2019-01-14
console: Change BOOTBLOCK_CONSOLE default to `y`
Nico Huber
2018-12-28
arch/x86: SSE2 implies SSE support
Kyösti Mälkki
2018-12-18
Fix typos involving "the the"
Jonathan Neuschäfer
2018-11-16
{soc,sb}/amd: Remove unused SOUTHBRIDGE_AMD_*_SKIP_ISA_DMA_INIT
Elyes HAOUAS
2018-10-22
soc/amd: Implement common reset API
Nico Huber
2018-09-11
amd/stoneyridge: Enable BERT table generation
Marshall Dawson
2018-08-15
Stoneyridge: Remove VENDORCODE_FULL_SUPPORT
Richard Spiegel
2018-08-06
google/grunt: Move PSP_SELECTABLE_SMU_FW to soc
Richard Spiegel
2018-07-31
src/soc/amd/stoneyridge: Remove IMC support
Richard Spiegel
2018-06-14
stoneyridge: Increase SMM stack size to 2K
Raul E Rangel
2018-06-14
AGESA binaryPI: Drop RAMBASE and RAMTOP
Kyösti Mälkki
2018-06-06
arch/x86: Make RELOCATABLE_RAMSTAGE the default
Kyösti Mälkki
2018-05-22
amd/stoneyridge: Increase SMM reserved memory
Marshall Dawson
2018-05-09
vendorcode/amd/pi/00670F00: Control which procedure builds
Richard Spiegel
2018-04-27
soc/amd/stoneyridge: Enable CMOS VBNV backup to flash
Marc Jones
2018-03-07
soc/amd/stoneyridge/Kconfig: Create a power restore option
Richard Spiegel
2018-02-16
amd/stoneyridge: Use generic fixed MTRR setup
Marshall Dawson
2018-02-12
amd/stoneyridge: Add S3 support to POST
Marshall Dawson
2018-02-07
amd/stoneyridge: Put stage cache into TSEG
Marshall Dawson
2018-01-25
soc/amd/stoneyridge: remove dependence on TSC
Aaron Durbin
2018-01-25
src/soc/amd/stoneyridge/Kconfig: Use vbios new location
Richard Spiegel
2018-01-24
soc/amd/stoneyridge: provide alternate monotonic timer
Aaron Durbin
2018-01-08
soc/amd/stoneyridge: Define CONSOLE_UART_BASE_ADDRESS
Arthur Heymans
2018-01-07
3rdparty/blobs/soc/amd/stoneyridge: Use new location of stoneyridge blob
Richard Spiegel
2018-01-03
soc/amd/stoneyridge: Add I2C support
Chris Ching
2017-12-22
amd/stoneyridge: Increase pre-cbmem console size
Marshall Dawson
2017-12-22
soc/amd/stoneyridge: select RTC
Marc Jones
2017-12-18
amd/stoneyridge: Skip VGA initialization on S3 resume
Marshall Dawson
2017-12-12
soc/amd/common: Move AGESA related source files
Richard Spiegel
2017-12-11
soc/amd/common: Move files to common/block
Richard Spiegel
2017-12-11
soc/amd/stoneyridge: Enable SPI writes
John E. Kabat Jr
2017-12-08
soc/amd/stoneyridge: Add RO_REGION_ONLY
Marc Jones
2017-12-02
soc/amd/stoneyridge: Add RunOnAP support
Marc Jones
2017-11-23
soc/amd/stoneyridge: Get entire DDR4 SPD
Marc Jones
2017-11-10
amd/stoneyridge: Select AMD common sleep states
Marshall Dawson
2017-11-08
amd/stoneyridge: Add SMU firmware blobs to cbfs
Marshall Dawson
2017-10-19
soc/amd/stoneyridge: Use macros for PCI_DEVFN calls
Chris Ching
2017-10-16
soc/amd/stoneyridge: Update AMD firmware placement options
Martin Roth
2017-10-03
soc/amd/stoney: Allow alternative placement for AMD FW directory
Martin Roth
2017-09-27
soc/amd/stoneyridge: Enable SSE
Martin Roth
2017-09-27
soc/amd/stoneyridge: Add postcar stage
Marshall Dawson
2017-09-27
amd/stoneyridge: Enable SMM in TSEG
Marshall Dawson
2017-09-27
amd/stoneyridge: Convert MP init to mp_init_with_smm
Marshall Dawson
2017-09-26
amd/stoneyridge: Simplify memory hole calculation
Marshall Dawson
2017-09-13
amd/stoneyridge: Make cbmem_top SMM aware
Marshall Dawson
2017-09-08
soc/amd/stoneyridge: Update amdfw build
Martin Roth
2017-08-29
amd/stoneyridge: Change ACPI _PR.CPxx to _PR.Pxxx
Marc Jones
2017-08-28
soc/amd/stoneyridge: Increase preram console size
Marshall Dawson
2017-08-04
soc/amd/stoneyridge: Use generic gpio library
Marc Jones
2017-07-27
soc/amd/stoneyridge: Enable verstage support
Marshall Dawson
2017-07-27
soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK
Marshall Dawson
2017-07-02
soc/amd/common: Add initial support for AMD PSP
Marshall Dawson
2017-06-29
soc/amd/stoneyridge: Convert monotonic timer
Marshall Dawson
2017-06-28
soc/amd/stoneyridge: Enable early cbmem
Marshall Dawson
2017-06-27
soc/amd/stoneyridge: Add tseg size to Kconfig
Marshall Dawson
2017-06-26
soc/amd/stoneyridge: Add northbridge support
Marc Jones
2017-06-26
soc/amd/stoneyridge: Add CPU files
Marc Jones
2017-06-26
soc: Add AMD Stoney Ridge southbridge code
Marc Jones