coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-02-02	soc/amd/picasso/pcie_gpe: use PICM instead of PMOD in APCI code	Felix Held
2021-01-23	soc/amd/picasso/pcie_gpp: Remove duplication in pirq_data declaration	Raul E Rangel
2021-01-23	soc/amd/picasso/pci_gpp: Replace the swizzle string with a u8 array	Raul E Rangel
2021-01-23	soc/amd/picasso/pcie_gpp: Add clarifying comment	Raul E Rangel
2021-01-08	soc/amd/picasso: Generate GNB IO-APIC PCI routing table	Raul E Rangel
2021-01-06	soc/amd/picasso: Correctly populate the PCI interrupt line register	Raul E Rangel
2021-01-06	soc/amd/picasso: Fix ACPI PCI routing table	Raul E Rangel
2020-11-18	include/device/pci_ids: add model number to PCIe port and bus devices	Felix Held
2020-07-30	soc/amd/picasso: Split ops for internal and external PCIe GPP bridges	Furquan Shaikh
2020-07-10	soc/amd/picasso: Add driver for handling PCIE GPP bridges	Furquan Shaikh