coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-02-13	soc/amd: introduce and use common IOAPIC IDs	Felix Held
2021-02-05	soc/amd/picasso: add UPD for RV2 USB3 phy setting adjust	Chris Wang
2021-02-03	soc/amd/picasso: clean up and re-sort UPD table	Chris Wang
2021-01-25	soc/amd/picasso: Add UPDs for support eDP power sequence adjust	Chris Wang
2021-01-25	soc/amd/picasso: Set UPDs for tuning eDP phy	Chris Wang
2020-12-09	soc/amd/picasso: Rename SD_EMMC_EMMC_DDR_52 to SD_EMMC_EMMC_DDR_104	Raul E Rangel
2020-10-08	soc/amd/picasso: Remove xhci0_force_gen1 from soc config	Chris Wang
2020-10-08	soc/amd/picasso: Add UPD for support force USB3 to Gen1 by port	Chris Wang
2020-09-28	soc/amd/picasso: Set eMMC preset UPDs	Raul E Rangel
2020-09-14	soc/amd/picasso: Move sd_emmc_config into emmc_config struct	Raul E Rangel
2020-09-10	soc/amd/picasso: Assign IOAPIC IDs, GNB APIC base with FSP	Marshall Dawson
2020-07-27	soc/amd/picasso: make USB over-current pin mapping configurable	Felix Held
2020-07-26	amd/picasso: rework USB2 PHY tune parameter handling	Felix Held
2020-07-25	soc/amd/picasso: don't apply unconfigured USB2 PHY tune parameters	Felix Held
2020-07-24	soc/amd/picasso/fsp_params: add missing newline between functions	Felix Held
2020-07-24	soc/amd/picasso/fsp_params: add asserts for descriptor count	Felix Held
2020-07-23	amd/picasso: rename PCIe descriptor to DXIO descriptor	Felix Held
2020-07-15	amd/picasso: rework DXIO and DDI UPD handling	Felix Held
2020-07-06	mb/google/zork: Add USB2 phy tuning parameter for SI tuning	Chris Wang
2020-06-24	soc/amd/picasso: Add UPD xhci0_force_gen1	Chris Wang
2020-06-11	vc/amd/fsp/platform_descriptors: drop prefix from PCIe/DDI structs	Felix Held
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-01	soc/amd/picasso: add sd/emmc0 configuration to chip.h	Aaron Durbin
2020-05-01	soc/amd/picasso: Allow mainboard to provide pci ddi descriptors	Aaron Durbin