coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-10-15	soc/amd: make configure_espi_with_mb_hook call conditional	Felix Held
2021-10-15	soc/amd/common/include/espi: rename configure_espi	Felix Held
2021-10-13	soc/amd/common/block/espi_util: Refactor eSPI Setup	Karthikeyan Ramasubramanian
2021-10-13	soc/amd/*: Enable ACPIMMIO decode first in fch_pre_init	Felix Held
2021-09-09	soc/amd/common/block/include/i2c: introduce I2C_RESET_SCL_PIN macro	Felix Held
2021-09-08	soc/amd/*/bootblock,early_fch: rework i2c_scl_pins configuration	Felix Held
2021-08-30	soc/amd: Show SPI settings in bootblock	Martin Roth
2021-04-14	soc/amd/piasso/fch: use common pm_set_power_failure_state functionality	Felix Held
2021-04-05	soc/amd: Make espi_configure_decodes private	Raul E Rangel
2021-03-29	soc/amd: add DISABLE_KEYBOARD_RESET_PIN option	Felix Held
2021-03-22	soc/amd/common: Introduce I2C driver common to all AMD SoCs	Karthikeyan Ramasubramanian
2020-12-11	soc/amd/picasso: rename PICASSO_CONSOLE_UART to AMD_SOC_CONSOLE_UART	Felix Held
2020-12-09	soc/amd/picasso: split southbridge into bootblock and ramstage code	Felix Held